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BranchCommit messageAuthorAge
main[RISCV] Simplify some code in unpackFromMemLoc. NFCCraig Topper91 min.
users/alexey-bataev/spr/slpinitial-support-for-non-power-of-2-but-still-whole-register-number-of-elements-in-operands-1Rebase, address commentsAlexey Bataev8 hours
users/arsenm/amdgpu-add-noalias-addrspace-autoupgrade-atomic-intrinsicsAMDGPU: Add noalias.addrspace metadata when autoupgrading atomic intrinsicsMatt Arsenault14 hours
users/arsenm/noalias-addrspace-metadataAdd another commentMatt Arsenault11 hours
users/bogner/sprdirectx-lower-llvmdxtypedbufferload-to-dxil-opsRework to match llvm/wg-hlsl#59Justin Bogner4 hours
users/bogner/sprmain.directx-lower-llvmdxtypedbufferload-to-dxil-ops[𝘀𝗽𝗿] changes introduced through rebaseMircea Trofin4 hours
users/chbarto/test_onedllset the C runtime linkage to /MD only for sanitizer_common, interception, and...Charlie Barto11 hours
users/krzysz00/nvvm-range-plumbing[mlir][GPU] Plumb range information through the NVVM lowteringsKrzysztof Drewniak5 hours
users/krzysz00/refactor-range-attributes-rocdl[mlir][LLVM] Refactor how range() annotations are handled for ROCDL intrinsicsKrzysztof Drewniak5 hours
users/mtrofin/09-05-_ctx_prof_insert_the_ctx_prof_flattener_after_the_module_inliner[ctx_prof] Insert the ctx prof flattener after the module inlinerMircea Trofin95 min.
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TagDownloadAuthorAge
llvmorg-19.1.0-rc4llvmorg-19.1.0-rc4.zip  llvmorg-19.1.0-rc4.tar.gz  llvmorg-19.1.0-rc4.tar.bz2  Tobias Hieta4 days
llvmorg-19.1.0-rc3llvmorg-19.1.0-rc3.zip  llvmorg-19.1.0-rc3.tar.gz  llvmorg-19.1.0-rc3.tar.bz2  Tobias Hieta3 weeks
llvmorg-19.1.0-rc2llvmorg-19.1.0-rc2.zip  llvmorg-19.1.0-rc2.tar.gz  llvmorg-19.1.0-rc2.tar.bz2  Tobias Hieta5 weeks
llvmorg-19.1.0-rc1llvmorg-19.1.0-rc1.zip  llvmorg-19.1.0-rc1.tar.gz  llvmorg-19.1.0-rc1.tar.bz2  Tobias Hieta6 weeks
llvmorg-20-initllvmorg-20-init.zip  llvmorg-20-init.tar.gz  llvmorg-20-init.tar.bz2  Tobias Hieta7 weeks
llvmorg-18.1.8llvmorg-18.1.8.zip  llvmorg-18.1.8.tar.gz  llvmorg-18.1.8.tar.bz2  Tom Stellard3 months
llvmorg-18.1.7llvmorg-18.1.7.zip  llvmorg-18.1.7.tar.gz  llvmorg-18.1.7.tar.bz2  Tom Stellard3 months
llvmorg-18.1.6llvmorg-18.1.6.zip  llvmorg-18.1.6.tar.gz  llvmorg-18.1.6.tar.bz2  Tom Stellard4 months
llvmorg-18.1.5llvmorg-18.1.5.zip  llvmorg-18.1.5.tar.gz  llvmorg-18.1.5.tar.bz2  Tom Stellard4 months
llvmorg-18.1.4llvmorg-18.1.4.zip  llvmorg-18.1.4.tar.gz  llvmorg-18.1.4.tar.bz2  Tom Stellard5 months
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AgeCommit messageAuthorFilesLines
2021-06-28Revert "Revert "[Coverage] Fix branch coverage merging in FunctionCoverageSum...llvmorg-12.0.1-rc4llvmorg-12.0.1release/12.xTom Stellard3-6/+21
2021-06-25[ARM] Use just ARM::t2B in ARMBlockPlacementPassllvmorg-12.0.1-rc3David Green2-7/+4
2021-06-25[ARM] Fix Changed status in MVEGatherScatterLoweringPass.David Green1-1/+1
2021-06-25[ARM] Ensure instructions are simplified prior to GatherScatter lowering.David Green9-52/+96
2021-06-25[ARM] Clean up some tests, removing dead instructions. NFCDavid Green23-735/+39
2021-06-25[ARM] Ensure loop invariant active.lane.mask operandsDavid Green2-0/+149
2021-06-25[ARM] Guard against loop variant gather ptr operandsDavid Green2-1/+46
2021-06-25[ARM] Handle debug instrs in ARM Low Overhead Loop passVictor Campos2-7/+343
2021-06-25[ARM] Skip debug during vpt block creationDavid Green2-11/+18
2021-06-25[ARM] MVE VPT block tests with debug info. NFCDavid Green1-0/+114
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