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BranchCommit messageAuthorAge
main[RISCV] Simplify some code in unpackFromMemLoc. NFCCraig Topper92 min.
users/alexey-bataev/spr/slpinitial-support-for-non-power-of-2-but-still-whole-register-number-of-elements-in-operands-1Rebase, address commentsAlexey Bataev8 hours
users/arsenm/amdgpu-add-noalias-addrspace-autoupgrade-atomic-intrinsicsAMDGPU: Add noalias.addrspace metadata when autoupgrading atomic intrinsicsMatt Arsenault14 hours
users/arsenm/noalias-addrspace-metadataAdd another commentMatt Arsenault11 hours
users/bogner/sprdirectx-lower-llvmdxtypedbufferload-to-dxil-opsRework to match llvm/wg-hlsl#59Justin Bogner4 hours
users/bogner/sprmain.directx-lower-llvmdxtypedbufferload-to-dxil-ops[๐˜€๐—ฝ๐—ฟ] changes introduced through rebaseMircea Trofin4 hours
users/chbarto/test_onedllset the C runtime linkage to /MD only for sanitizer_common, interception, and...Charlie Barto11 hours
users/krzysz00/nvvm-range-plumbing[mlir][GPU] Plumb range information through the NVVM lowteringsKrzysztof Drewniak5 hours
users/krzysz00/refactor-range-attributes-rocdl[mlir][LLVM] Refactor how range() annotations are handled for ROCDL intrinsicsKrzysztof Drewniak5 hours
users/mtrofin/09-05-_ctx_prof_insert_the_ctx_prof_flattener_after_the_module_inliner[ctx_prof] Insert the ctx prof flattener after the module inlinerMircea Trofin97 min.
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TagDownloadAuthorAge
llvmorg-19.1.0-rc4llvmorg-19.1.0-rc4.zip  llvmorg-19.1.0-rc4.tar.gz  llvmorg-19.1.0-rc4.tar.bz2  Tobias Hieta4 days
llvmorg-19.1.0-rc3llvmorg-19.1.0-rc3.zip  llvmorg-19.1.0-rc3.tar.gz  llvmorg-19.1.0-rc3.tar.bz2  Tobias Hieta3 weeks
llvmorg-19.1.0-rc2llvmorg-19.1.0-rc2.zip  llvmorg-19.1.0-rc2.tar.gz  llvmorg-19.1.0-rc2.tar.bz2  Tobias Hieta5 weeks
llvmorg-19.1.0-rc1llvmorg-19.1.0-rc1.zip  llvmorg-19.1.0-rc1.tar.gz  llvmorg-19.1.0-rc1.tar.bz2  Tobias Hieta6 weeks
llvmorg-20-initllvmorg-20-init.zip  llvmorg-20-init.tar.gz  llvmorg-20-init.tar.bz2  Tobias Hieta7 weeks
llvmorg-18.1.8llvmorg-18.1.8.zip  llvmorg-18.1.8.tar.gz  llvmorg-18.1.8.tar.bz2  Tom Stellard3 months
llvmorg-18.1.7llvmorg-18.1.7.zip  llvmorg-18.1.7.tar.gz  llvmorg-18.1.7.tar.bz2  Tom Stellard3 months
llvmorg-18.1.6llvmorg-18.1.6.zip  llvmorg-18.1.6.tar.gz  llvmorg-18.1.6.tar.bz2  Tom Stellard4 months
llvmorg-18.1.5llvmorg-18.1.5.zip  llvmorg-18.1.5.tar.gz  llvmorg-18.1.5.tar.bz2  Tom Stellard4 months
llvmorg-18.1.4llvmorg-18.1.4.zip  llvmorg-18.1.4.tar.gz  llvmorg-18.1.4.tar.bz2  Tom Stellard5 months
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AgeCommit messageAuthorFilesLines
2021-06-16[๐Ÿ’][libc++] Un-deprecate std::allocator<void>llvmorg-12.0.1-rc2Louis Dionne11-141/+137
2021-06-15[llvm][PPC] Add missing case for 'I' asm memory operandsTimm Bรคder2-0/+25
2021-06-15[clang-format] Rework Whitesmiths mode to use line-level values in UnwrappedL...Tim Wojtulewicz5-41/+170
2021-06-15[OpenMP] Fix typo in libomptarge for the wrong environment variableJoseph Huber1-1/+1
2021-06-15[PowerPC] Make sure the first probe is full size or is the last probe when st...Kai Luo4-614/+596
2021-06-15[PowerPC][Dwarf] Assign MMA register's dwarf register number to negative valueKai Luo1-18/+18
2021-06-15[ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode.Yvan Roux2-23/+19
2021-06-15[X86] Add ISD::FREEZE and ISD::AssertAlign to the list of opcodes that don't ...Craig Topper2-4/+30
2021-06-14Make clangd CompletionModel not depend on directory layout.Harald van Dijk1-1/+2
2021-06-14Make clangd CompletionModel usable even with non-standard (but supported) layoutserge-sans-paille1-2/+2
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