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AgeCommit message (Expand)AuthorFilesLines
2017-06-07Make LD_HWCAP_MASK usable for static binariesSiddhesh Poyarekar1-5/+3
2017-06-07tunables: Use glibc.tune.hwcap_mask tunable instead of _dl_hwcap_maskSiddhesh Poyarekar1-0/+4
2017-06-05x86: Don't use dl_x86_cpu_features in cacheinfo.cH.J. Lu1-15/+22
2017-06-05x86-64: Optimize memcmp/wmemcmp with AVX2 and MOVBEH.J. Lu1-0/+1
2017-06-05x86: Add macros to implement ifunce selection in CH.J. Lu1-0/+40
2017-06-02x86: Update __x86_shared_non_temporal_thresholdH.J. Lu1-2/+4
2017-05-31Delay initialization of CPU features struct in static binariesSiddhesh Poyarekar1-18/+5
2017-05-24x86: Don't include cacheinfo.c in ld.soH.J. Lu1-0/+4
2017-05-24x86: Use __get_cpu_features to get cpu_featuresH.J. Lu1-10/+9
2017-05-09Move shared pthread definitions to common headersAdhemerval Zanella2-271/+99
2017-05-03x86: Set dl_platform and dl_hwcap from CPU features [BZ #21391]H.J. Lu5-1/+223
2017-04-18x86: Use AVX2 memcpy/memset on Skylake server [BZ #21396]H.J. Lu2-1/+8
2017-04-18x86: Set Prefer_No_VZEROUPPER if AVX512ER is availableH.J. Lu2-2/+21
2017-04-10Consolidate pthreadtype.h placementConsolidate pthreadtype.h placementAdhemerval Zanella1-0/+0
2017-04-10Add sysdeps/x86/dl-procinfo.cH.J. Lu1-0/+52
2017-04-07Check if SSE is available with HAS_CPU_FEATUREH.J. Lu1-0/+4
2017-03-17Use CPU_FEATURES_CPU_P to check if AVX is availableH.J. Lu1-2/+1
2017-03-16Remove C++ namespace handling from glibc headers.Joseph Myers1-14/+0
2017-03-15Fix test-math-vector-sincos.h aliasing.Joseph Myers1-14/+14
2017-02-17Use index_cpu_RTM and reg_RTM to clear the bit_cpu_RTM bitH.J. Lu1-1/+1
2017-01-10New pthread rwlock that is more scalable.Torvald Riegel1-14/+14
2017-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers33-33/+33
2016-12-31New condvar implementation that provides stronger ordering guarantees.Torvald Riegel1-8/+21
2016-12-19Disable TSX on some Haswell processors.Andrew Senkevich1-6/+23
2016-12-14Refactor long double information into bits/long-double.h.Joseph Myers1-20/+0
2016-12-05Use C11-like atomics instead of plain memory accesses in x86 lock elision.Torvald Riegel1-11/+19
2016-12-01Refactor FP_ILOGB* out of bits/mathdef.h.Joseph Myers2-9/+24
2016-11-29Refactor FP_FAST_* into bits/fp-fast.h.Joseph Myers1-14/+0
2016-11-24Refactor float_t, double_t information into bits/flt-eval-method.h.Joseph Myers2-17/+33
2016-11-23Fix x86_64 -mfpmath=387 float_t, double_t (bug 20787).Joseph Myers4-2/+9
2016-11-07nptl: Document the reason why __kind in pthread_mutex_t is part of the ABIFlorian Weimer1-1/+1
2016-11-04Define wordsize.h macros everywhereSteve Ellcey1-0/+4
2016-10-17Bug 20689: Fix FMA and AVX2 detection on IntelCarlos O'Donell1-10/+14
2016-10-12X86: Don't assert on older Intel CPUs [BZ #20647]H.J. Lu1-1/+3
2016-10-06Add iseqsig.Joseph Myers1-0/+28
2016-09-23Installed header hygiene (BZ#20366): Test of installed headers.Zack Weinberg1-0/+6
2016-09-07Add femode_t functions.Joseph Myers1-0/+14
2016-09-06X86-64: Add _dl_runtime_resolve_avx[512]_{opt|slow} [BZ #20508]H.J. Lu2-0/+20
2016-08-19X86: Change bit_YMM_state to (1 << 2)H.J. Lu1-1/+1
2016-07-01Fixed wrong vector sincos/sincosf ABI to have it compatible withAndrew Senkevich1-0/+98
2016-06-30Check Prefer_ERMS in memmove/memcpy/mempcpy/memsetH.J. Lu1-0/+3
2016-06-29Avoid array-bounds warning for strncat on i586 (bug 20260)Andreas Schwab1-2/+1
2016-06-07Check FMA after COMMON_CPUID_INDEX_80000001H.J. Lu1-4/+9
2016-05-27Count number of logical processors sharing L2 cacheH.J. Lu1-34/+116
2016-05-20Remove special L2 cache case for Knights LandingH.J. Lu1-2/+0
2016-05-19Correct Intel processor level type mask from CPUIDH.J. Lu1-1/+1
2016-05-19Check the HTT bit before counting logical threadsH.J. Lu2-76/+85
2016-05-13Support non-inclusive caches on Intel processorsH.J. Lu1-1/+11
2016-05-11Remove x86 ifunc-defines.sym and rtld-global-offsets.symH.J. Lu4-10/+18
2016-05-08Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86H.J. Lu1-0/+673
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