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AgeCommit message (Expand)AuthorFilesLines
2023-08-29x86: Check the lower byte of EAX of CPUID leaf 2 [BZ #30643]H.J. Lu1-18/+13
2023-08-11x86: Fix incorrect scope of setting `shared_per_thread` [BZ# 30745]Noah Goldstein1-4/+3
2023-08-06x86: Fix for cache computation on AMD legacy cpus.Sajan Karumanchi1-27/+199
2023-07-27<sys/platform/x86.h>: Add APX supportH.J. Lu4-0/+11
2023-07-18[PATCH v1] x86: Use `3/4*sizeof(per-thread-L3)` as low bound for NT threshold.Noah Goldstein1-3/+12
2023-07-18x86: Fix slight bug in `shared_per_thread` cache size calculation.Noah Goldstein1-2/+2
2023-07-17configure: Use autoconf 2.71Siddhesh Poyarekar1-46/+52
2023-06-26x86: Make dl-cache.h and readelflib.c not Linux-specificSergey Bugaev1-0/+90
2023-06-19Fix misspellings -- BZ 25337Paul Pluzhnikov2-2/+2
2023-06-12x86: Make the divisor in setting `non_temporal_threshold` cpu specificNoah Goldstein4-26/+51
2023-06-12x86: Refactor Intel `init_cpu_features`Noah Goldstein1-81/+309
2023-06-12x86: Increase `non_temporal_threshold` to roughly `sizeof_L3 / 4`Noah Goldstein1-27/+43
2023-06-02Fix a few more typos I missed in previous round -- BZ 25337Paul Pluzhnikov1-1/+1
2023-05-30Fix misspellings in sysdeps/ -- BZ 25337Paul Pluzhnikov3-3/+3
2023-05-27x86: Use 64MB as nt-store threshold if no cacheinfo [BZ #30429]Noah Goldstein1-1/+9
2023-04-05<sys/platform/x86.h>: Add PREFETCHI supportH.J. Lu4-0/+7
2023-04-05<sys/platform/x86.h>: Add AMX-COMPLEX supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add AVX-NE-CONVERT supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add AVX-VNNI-INT8 supportH.J. Lu4-0/+17
2023-04-05<sys/platform/x86.h>: Add MSRLIST supportH.J. Lu2-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-IFMA supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add AMX-FP16 supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add WRMSRNS supportH.J. Lu2-0/+2
2023-04-05<sys/platform/x86.h>: Add ArchPerfmonExt supportH.J. Lu2-0/+2
2023-04-05<sys/platform/x86.h>: Add CMPCCXADD supportH.J. Lu4-0/+7
2023-04-05<sys/platform/x86.h>: Add LASS supportH.J. Lu2-0/+2
2023-04-05<sys/platform/x86.h>: Add RAO-INT supportH.J. Lu4-0/+7
2023-04-05<sys/platform/x86.h>: Add LBR supportH.J. Lu2-1/+2
2023-04-05<sys/platform/x86.h>: Add RTM_FORCE_ABORT supportH.J. Lu2-1/+2
2023-04-05<sys/platform/x86.h>: Add SGX-KEYS supportH.J. Lu2-1/+2
2023-04-05<sys/platform/x86.h>: Add BUS_LOCK_DETECT supportH.J. Lu2-1/+2
2023-04-05<sys/platform/x86.h>: Add LA57 supportH.J. Lu2-1/+2
2023-04-05<bits/platform/x86.h>: Rename to x86_cpu_INDEX_7_ECX_15H.J. Lu1-1/+1
2023-04-04x86/dl-cacheinfo: remove unsused parameter from handle_amdAndreas Schwab1-36/+30
2023-04-03x86: Set FSGSBASE to active if enabled by kernelH.J. Lu3-0/+31
2023-03-29Remove --enable-tunables configure optionAdhemerval Zanella Netto5-68/+29
2023-03-21x86: Don't check PREFETCHWT1 in tst-cpu-features-cpuinfo.cDJ Delorie1-0/+3
2023-03-07x86: Fix bug about glibc.cpu.hwcaps.caiyinyu1-3/+3
2023-02-22x86-64: Add glibc.cpu.prefer_map_32bit_exec [BZ #28656]H.J. Lu2-0/+16
2023-02-17string: Remove string_private.hAdhemerval Zanella1-20/+0
2023-02-12htl: Generalize i386 pt-machdep.h to x86Samuel Thibault1-0/+28
2023-01-18x86: Cache computation for AMD architecture.Sajan Karumanchi1-159/+45
2023-01-06Update copyright dates with scripts/update-copyrightsJoseph Myers121-121/+121
2023-01-03x86: Check minimum/maximum of non_temporal_threshold [BZ #29953]H.J. Lu1-9/+16
2022-12-06x86_64: State assembler is being tested on sysdeps/x86/configureAdhemerval Zanella2-3/+3
2022-12-06configure: Remove AS checkAdhemerval Zanella2-3/+3
2022-10-06elf: Remove _dl_string_hwcapJavier Pello1-14/+0
2022-10-03x86-64: Require BMI1/BMI2 for AVX2 strrchr and wcsrchr implementationsAurelien Jarno1-0/+1
2022-10-03x86-64: Require BMI2 and LZCNT for AVX2 memrchr implementationAurelien Jarno1-0/+1
2022-10-03x86: include BMI1 and BMI2 in x86-64-v3 levelAurelien Jarno1-0/+2
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