| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-03-06 | x86: Set minimum x86-64 level marker [BZ #27318] | H.J. Lu | 1 | -0/+16 |
| 2021-01-07 | x86: Support GNU_PROPERTY_X86_ISA_1_V[234] marker [BZ #26717] | H.J. Lu | 1 | -0/+66 |
| 2020-05-18 | x86: Add --enable-cet=permissive | H.J. Lu | 1 | -10/+9 |
| 2018-07-16 | x86: Support IBT and SHSTK in Intel CET [BZ #21598] | H.J. Lu | 1 | -0/+46 |
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index : rocket-tools/riscv-gnu-toolchain/glibc.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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