| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-06-20 | tunables: Add IFUNC selection and cache sizes | H.J. Lu | 1 | -1/+9 |
| 2017-06-05 | x86: Don't use dl_x86_cpu_features in cacheinfo.c | H.J. Lu | 1 | -15/+22 |
| 2017-06-02 | x86: Update __x86_shared_non_temporal_threshold | H.J. Lu | 1 | -2/+4 |
| 2017-05-24 | x86: Don't include cacheinfo.c in ld.so | H.J. Lu | 1 | -0/+4 |
| 2017-05-24 | x86: Use __get_cpu_features to get cpu_features | H.J. Lu | 1 | -10/+9 |
| 2017-01-01 | Update copyright dates with scripts/update-copyrights. | Joseph Myers | 1 | -1/+1 |
| 2016-10-12 | X86: Don't assert on older Intel CPUs [BZ #20647] | H.J. Lu | 1 | -1/+3 |
| 2016-05-27 | Count number of logical processors sharing L2 cache | H.J. Lu | 1 | -34/+116 |
| 2016-05-20 | Remove special L2 cache case for Knights Landing | H.J. Lu | 1 | -2/+0 |
| 2016-05-19 | Correct Intel processor level type mask from CPUID | H.J. Lu | 1 | -1/+1 |
| 2016-05-19 | Check the HTT bit before counting logical threads | H.J. Lu | 1 | -76/+82 |
| 2016-05-13 | Support non-inclusive caches on Intel processors | H.J. Lu | 1 | -1/+11 |
| 2016-05-08 | Move sysdeps/x86_64/cacheinfo.c to sysdeps/x86 | H.J. Lu | 1 | -0/+673 |
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