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On some targets using bool in support/check_mem_access.h resulted
in build error due to stdbool.h not being included, fix this.
See 9be489d77867dd2444ecc044a5f3049d1751ee85 for details.
Reported-by: Joseph Myers <josmyers@redhat.com>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Compiler inlines trunc and truncf with SSE4.1. But older versions of GCC
doesn't inline them with -Os:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121861
Don't use asm statement for trunc and truncf if compiler can inline them
with -Os. It removes one register move with GCC 16:
__modff_sse41: __modff_sse41:
.LFB23: .LFB23:
.cfi_startproc .cfi_startproc
endbr64 endbr64
subq $24, %rsp subq $24, %rsp
.cfi_def_cfa_offset 32 .cfi_def_cfa_offset 32
movq %fs:40, %rax movq %fs:40, %rax
movq %rax, 8(%rsp) movq %rax, 8(%rsp)
xorl %eax, %eax xorl %eax, %eax
movd %xmm0, %eax movd %xmm0, %eax
addl %eax, %eax addl %eax, %eax
cmpl $-16777216, %eax cmpl $-16777216, %eax
je .L7 je .L7
> movaps %xmm0, %xmm3
movaps %xmm0, %xmm4 movaps %xmm0, %xmm4
movss .LC0(%rip), %xmm2 | movss .LC0(%rip), %xmm1
movaps %xmm2, %xmm3 | movaps %xmm1, %xmm2
andps %xmm0, %xmm2 | roundss $11, %xmm3, %xmm3
roundss $11, %xmm0, %xmm1 | subss %xmm3, %xmm4
subss %xmm1, %xmm4 | andps %xmm0, %xmm1
andnps %xmm4, %xmm3 | andnps %xmm4, %xmm2
orps %xmm3, %xmm2 | orps %xmm2, %xmm1
.L3: .L3:
movss %xmm1, (%rdi) | movss %xmm3, (%rdi)
movq 8(%rsp), %rax movq 8(%rsp), %rax
subq %fs:40, %rax subq %fs:40, %rax
jne .L8 jne .L8
movaps %xmm2, %xmm0 | movaps %xmm1, %xmm0
addq $24, %rsp addq $24, %rsp
.cfi_remember_state .cfi_remember_state
.cfi_def_cfa_offset 8 .cfi_def_cfa_offset 8
ret ret
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Uros Bizjak <ubizjak@gmail.com>
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The "unused" variable could be use unitialized, which is an issue if ldd
is ran with "-u". Fix that by defining the variable to an empty value,
just like it is already done for the bind_now, warn and verbose
variables.
Reported-by: Johan Palmqvist <johan.palmqvist@gmail.com>
Reviewed-by: Sam James <sam@gentoo.org>
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On i686, after GCC 16 commit:
commit 07d8de9174c421d719649639a1452b8b9f2eee32
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Jul 2 08:58:23 2025 +0800
x86-64: Add --enable-x86-64-mfentry
which warns ‘-pg’ without ‘-mfentry’, when glibc is configured with
--disable-default-pie, GCC 16 fails to compile .op files and gmon tests
with error:
cc1: error: ‘-pg’ without ‘-mfentry’ may be unreliable with shrink wrapping [-Werror]
Compile .op files and gmon tests with -mfentry if it is supported by
CC/TEST_CC and glibc is configured with --disable-default-pie. This
fixes BZ #33376.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Joseph Myers <josmyers@redhat.com>
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Add check_mem_access(addr) function to check if memory at addr can
be written or read returning false if memory is not accessible.
This function changes signal handler for SIGSEGV and SIGBUS signals
when it is called first, and it is not thread-safe.
Co-authored-by: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Use the __seg_gs named address space qualifier to cast access to the
gscope_flag in the TCB as a %gs: prefixed address. This enables the
use of the "m" operand constraint, which informs the compiler about
memory access in the inline assembly.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Carlos O'Donell <carlos@redhat.com>
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THREAD_GSCOPE_RESET_FLAG()
Use the __seg_fs named address space qualifier to cast access to the
gscope_flag in the TCB as a %fs: prefixed address. This enables the
use of the "m" operand constraint, which informs the compiler about
memory access in the inline assembly.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Carlos O'Donell <carlos@redhat.com>
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The soft-float RISC-V definition of _FPU_SETCW results in a
-Werror=unused-but-set-variable= build failure with GCC mainline (in
math/setfpucw.c) because it does not use the dummy cw variable.
Change it to (void) (cw) as on other architectures to avoid this build
failure.
Tested with build-many-glibcs.py (compilers) for
riscv64-linux-gnu-rv64imac-lp64, which previously failed.
Reviewed-by: Sam James <sam@gentoo.org>
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The break statement in CHECK_MERGE is expected to exit the surrounding
while loop, not the do-while loop with in the macro. Remove the
do-while loop from the macro. It is not needed to turn the macro
expansion into a single statement due to the way CHECK_MERGE is used
(and the statement expression would cover this anyway).
Reviewed-by: Collin Funk <collin.funk1@gmail.com>
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The shmlba.h file related to the LoongArch architecture was introduced
in commit 3eed5f3a1ee to address the mismatch in the SHMLBA definition
between glibc and the kernel. See [1]. The SHMLBA definition was later
updated in commit d23b77953f5a. See [2]. Now, we adopt the definition
from the common layer.
[1]:
commit 3eed5f3a1ee356969afb403a1cf18d06f8d2d98a
Author: caiyinyu <caiyinyu@loongson.cn>
Date: Thu May 25 17:01:11 2023 +0800
LoongArch: Fix inconsistency in SHMLBA macro values between glibc and kernel
The LoongArch glibc was using the value of the SHMLBA macro from common code,
which is __getpagesize() (16k), but this was inconsistent with the value of
the SHMLBA macro in the kernel, which is SZ_64K (64k). This caused several
shmat-related tests in LTP (Linux Test Project) to fail. This commit fixes
the issue by ensuring that the glibc's SHMLBA macro value matches the value
used in the kernel like other architectures.
[2]:
commit d23b77953f5a4fbf94c05157b186aac2a247ae32
Author: Huacai Chen <chenhuacai@kernel.org>
Date: Wed Jan 17 12:43:08 2024 +0800
LoongArch: Change SHMLBA from SZ_64K to PAGE_SIZE
LoongArch has hardware page coloring for L1 Cache, so we don't have
cache aliases. But SFB (Store Fill Buffer) still has aliases. So we
define SHMLBA to SZ_64K previously. But there are losts of applications
use PAGE_SIZE rather than SHMLBA to mmap() file pages and shared pages.
Of course we can fix them one by one, but not easy.
On the other hand, we can simply disable SFB for 4KB page size to fix
cache alias (there will be performance decrease, but acceptable), and
in future we will fix SFB in hardware. So we can safely define SHMLBA to
PAGE_SIZE (use the generic shmparam.h) to make life easier.
Signed-off-by: caiyinyu <caiyinyu@loongson.cn>
Reported-by: lixing <lixing@loongson.cn>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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The l*[rint|round]f implements uses alpha 'cvtst/s', 'addt/suc',
adn 'cvttq/svd' which are not not fully IEEE compliant w.r.t
inexact-flag raising.. Use the software fallback implementation
instead.
Checked on alpha-linux-gnu.
Tested-by: Michael Cree <mcree@orcon.net.nz>
Reviewed-by: Carlos O'Donell <carlos@redhat.com>
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Checked on aarch64-linux-gnu and x86_64-linux-gnu
Reviewed-by: Collin Funk <collin.funk1@gmail.com>
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Checked on x86_64-linux-gnu, aarch64-linux-gnu, and
powerpc64le-linux-gnu.
Reviewed-by: DJ Delorie <dj@redhat.com>
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To avoid linknamespace issues on old standards. It is required
if the fallback fma implementation is used if/when it is also
used internally for other implementation.
Reviewed-by: DJ Delorie <dj@redhat.com>
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To avoid linknamespace issues on old standards. It is required
if the fallback fma implementation is used if/when it is also
used internally for other implementation.
Reviewed-by: DJ Delorie <dj@redhat.com>
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To avoid linknamespace issues on old standards. It is required
if the fallback fma implementation is used if/when it is also
used internally for other implementation.
Reviewed-by: DJ Delorie <dj@redhat.com>
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To avoid linknamespace issues on old standards. It is required
if the fallback fma implementation is used if/when it is also
used internally for other implementation.
Reviewed-by: DJ Delorie <dj@redhat.com>
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To avoid linknamespace issues on old standards. It is required
if the fallback fma implementation is used if/when it is also
used internally for other implementation.
Reviewed-by: DJ Delorie <dj@redhat.com>
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To avoid linknamespace issues on old standards. It is required
if the fallback fma implementation is used if/when it is also
used internally for other implementation.
Reviewed-by: DJ Delorie <dj@redhat.com>
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To avoid linknamespace issues on old standards. It is required
if the fallback fma implementation is used if/when it is also
used internally for other implementation.
Reviewed-by: DJ Delorie <dj@redhat.com>
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Random inputs in range [-20.00,20.00].
Reviewed-by: DJ Delorie <dj@redhat.com>
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Random input in range [-10,10].
Reviewed-by: DJ Delorie <dj@redhat.com>
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Random inputs in range [1.00,21.00]
Reviewed-by: DJ Delorie <dj@redhat.com>
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And remove duplicate info on each file wrt glibc changes. Also
add the core-math git repository link.
Reviewed-by: DJ Delorie <dj@redhat.com>
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The compiler might not inline the trunc function call for
USE_TRUNC_BUILTIN [1].
This patch adds an optimized __trunc/__truncf for x86 used
on modf ifunc variant to avoid the trunc libcall.
Checked on x86_64, x86_64-v2, x86_64-v3, and x86_64-v4. Used -O2 and
-Os options. Performed a full make check on x86_64 with both
optimizations.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121861
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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Unicode 17.0.0 Support: Character encoding, character type info, and
transliteration tables are all updated to Unicode 17.0.0, using
the generator scripts contributed by Mike FABIAN (Red Hat).
Changes in CHARMAP and WIDTH:
Total added characters in newly generated CHARMAP: 4803
Total removed characters in newly generated WIDTH: 0
Total changed characters in newly generated WIDTH: 0
Total added characters in newly generated WIDTH: 4512
Some combining characters and other non-spacing marks have been added
with WIDTH 0. Lots of characters have been added with WIDTH 2, most of
them are CJK Ideographs plus a few Tangut characters and 7 emoji.
Changes in ctype:
alpha: Added 4672 characters in new ctype which were not in old ctype
combining: Added 42 characters in new ctype which were not in old ctype
combining_level3: Added 8 characters in new ctype which were not in old ctype
graph: Added 4803 characters in new ctype which were not in old ctype
lower: Missing: ʕ 0x295 LATIN LETTER PHARYNGEAL VOICED FRICATIVE
lower: Added 27 characters in new ctype which were not in old ctype
print: Added 4803 characters in new ctype which were not in old ctype
punct: Added 131 characters in new ctype which were not in old ctype
tolower: Added 28 characters in new ctype which were not in old ctype
totitle: Added 28 characters in new ctype which were not in old ctype
toupper: Added 28 characters in new ctype which were not in old ctype
upper: Added 28 characters in new ctype which were not in old ctype
Nothing suspicious in the additions.
About the character removed from lower:
ʕ 0x295 LATIN LETTER PHARYNGEAL VOICED FRICATIVE
In UnicodeData.txt it changed from 'Ll' (Letter Lowercase) to 'Lo' (Letter Other):
-0295;LATIN LETTER PHARYNGEAL VOICED FRICATIVE;Ll;0;L;;;;;N;LATIN LETTER REVERSED GLOTTAL STOP;;;;
+0295;LATIN LETTER PHARYNGEAL VOICED FRICATIVE;Lo;0;L;;;;;N;LATIN LETTER REVERSED GLOTTAL STOP;;;;
Resolves: BZ #33289
Reviewed-by: Collin Funk <collin.funk1@gmail.com>
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Requires Neon (aka. Advanced SIMD). Looks up 16 characters at a time,
for a 2-3x perfomance improvement, and a ~30% speedup on the strtok &
strsep benchtests, as tested on Cortex A-{53,72}.
Signed-off-by: remph <lhr@disroot.org>
Reviewed-by: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
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Use the __seg_gs named address space qualifiers to cast reads of
the guard values in the TCB as %gs: prefixed addresses.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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Use the __seg_fs named address space qualifiers to cast reads of
the guard values in the TCB as %fs: prefixed addresses.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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The x86 version of thread_pointer.h is the same as the generic one.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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GCC 12 is currently the minimum supported compiler version.
Remove no longer needed __GNUC_PREREQ (11, 1) test from
__thread_pointer().
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
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Minor cleanup of libc_realloc: remove unnecessary special cases for mmap, move
ar_ptr initialization, first check for oldmem == NULL.
Reviewed-by: DJ Delorie <dj@redhat.com>
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Remove all unused atomics. Replace uses of catomic_increment and
catomic_decrement with atomic_fetch_add_relaxed which maps to a standard
compiler builtin. Relaxed memory ordering is correct for simple counters
since they only need atomicity.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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instead of undefined cases from casting uintptr_t into intptr_t.
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__atomic_compare_exchange_n
No functional changes.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Cc: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: Collin Funk <collin.funk1@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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The resulting libc.so is identical on both x86_64 and
i386 targets compared to unpatched builds:
$ sha1sum libc-x86_64-old.so libc-x86_64-new.so
74eca1b87f2ecc9757a984c089a582b7615d93e7 libc-x86_64-old.so
74eca1b87f2ecc9757a984c089a582b7615d93e7 libc-x86_64-new.so
$ sha1sum libc-i386-old.so libc-i386-new.so
882bbab8324f79f4fbc85224c4c914fc6822ece7 libc-i386-old.so
882bbab8324f79f4fbc85224c4c914fc6822ece7 libc-i386-new.so
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Cc: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: Collin Funk <collin.funk1@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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For x86_64 targets, __sync_synchronize emits a full 64-bit
'LOCK ORQ $0x0,(%rsp)' instead of 'LOCK ORL $0x0,(%rsp)'.
No functional changes.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Cc: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: Collin Funk <collin.funk1@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Remove obsolete catomic_* locking primitives which don't map
to standard compiler builtins.
There are still a couple of places in the tree that uses them
(malloc/arena.c and malloc/malloc.c).
x86 didn't define __arch_c_compare_and_exchange_bool_* primitives
so fallback code used __arch_c_compare_and_exchange_val_* primitives
instead. This resulted in unoptimal code for
catomic_compare_and_exchange_bool_acq where superfluous
CMP was emitted after CMPXCHG, e.g. in arena_get2:
775b8: 48 8d 4a 01 lea 0x1(%rdx),%rcx
775bc: 48 89 d0 mov %rdx,%rax
775bf: 64 83 3c 25 18 00 00 cmpl $0x0,%fs:0x18
775c6: 00 00
775c8: 74 01 je 775cb <arena_get2+0x35b>
775ca: f0 48 0f b1 0d 75 3d lock cmpxchg %rcx,0x163d75(%rip) # 1db348 <narenas>
775d1: 16 00
775d3: 48 39 c2 cmp %rax,%rdx
775d6: 74 7f je 77657 <arena_get2+0x3e7>
that now becomes:
775b8: 48 8d 4a 01 lea 0x1(%rdx),%rcx
775bc: 48 89 d0 mov %rdx,%rax
775bf: f0 48 0f b1 0d 80 3d lock cmpxchg %rcx,0x163d80(%rip) # 1db348 <narenas>
775c6: 16 00
775c8: 74 7f je 77649 <arena_get2+0x3d9>
OTOH, catomic_decrement does not fallback to atomic_fetch_add (, -1)
builtin but to the cmpxchg loop, so the generated code in arena_get2
regresses a bit, from using LOCK DECQ insn:
77829: 64 83 3c 25 18 00 00 cmpl $0x0,%fs:0x18
77830: 00 00
77832: 74 01 je 77835 <arena_get2+0x5c5>
77834: f0 48 ff 0d 0c 3b 16 lock decq 0x163b0c(%rip) # 1db348 <narenas>
7783b: 00
to a cmpxchg loop:
7783d: 48 8b 0d 04 3b 16 00 mov 0x163b04(%rip),%rcx # 1db348 <narenas>
77844: 48 8d 71 ff lea -0x1(%rcx),%rsi
77848: 48 89 c8 mov %rcx,%rax
7784b: f0 48 0f b1 35 f4 3a lock cmpxchg %rsi,0x163af4(%rip) # 1db348 <narenas>
77852: 16 00
77854: 0f 84 c9 fa ff ff je 77323 <arena_get2+0xb3>
7785a: eb e1 jmp 7783d <arena_get2+0x5cd>
Defining catomic_exchange_and_add using __atomic_fetch_add solves the
above issue and generates optimal:
77809: f0 48 83 2d 36 3b 16 lock subq $0x1,0x163b36(%rip) # 1db348 <narenas>
77810: 00 01
Depending on the target processor, the compiler may emit either
'LOCK ADD/SUB $1, m' or 'INC/DEC $1, m' instruction, due to partial
flag register stall issue.
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Cc: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: Collin Funk <collin.funk1@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Remove unused atomics from <sysdeps/x86/atomic-machine.h>.
The resulting libc.so is identical on both x86_64 and
i386 targets compared to unpatched builds:
$ sha1sum libc-x86_64-old.so libc-x86_64-new.so
b89aaa2b71efd435104ebe6f4cd0f2ef89fcac90 libc-x86_64-old.so
b89aaa2b71efd435104ebe6f4cd0f2ef89fcac90 libc-x86_64-new.so
$ sha1sum libc-i386-old.so libc-i386-new.so
aa70f2d64da2f0f516634b116014cfe7af3e5b1a libc-i386-old.so
aa70f2d64da2f0f516634b116014cfe7af3e5b1a libc-i386-new.so
Signed-off-by: Uros Bizjak <ubizjak@gmail.com>
Cc: Florian Weimer <fweimer@redhat.com>
Cc: Adhemerval Zanella Netto <adhemerval.zanella@linaro.org>
Cc: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: Collin Funk <collin.funk1@gmail.com>
Cc: H.J.Lu <hjl.tools@gmail.com>
Cc: Carlos O'Donell <carlos@redhat.com>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Switch to standard builtin atomics by removing the defines for
!USE_ATOMIC_COMPILER_BUILTINS.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Switch power to builtin atomics.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Switch hppa to builtin atomics.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Switch sh to builtin atomics.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Switch microblaze to builtin atomics.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Switch alpha to builtin atomics.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Switch m68k to builtin atomics.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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Use builtin atomics for atomic_compare_and_exchange_* and
atomic_exchange_and_add if USE_ATOMIC_COMPILER_BUILTINS is enabled.
This allows removing target atomic-machine.h headers.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
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