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author | H.J. Lu <hjl.tools@gmail.com> | 2017-04-18 14:01:45 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2017-04-18 14:01:45 -0700 |
commit | 4cb334c4d6249686653137ec273d081371b3672d (patch) | |
tree | 0ddce19851595aeccad1caf222c91014f7817de2 /sysdeps/x86_64/multiarch/memset.S | |
parent | 1c53cb49de6d82d9469ccbd5aa0c55924502bd8b (diff) | |
download | glibc-4cb334c4d6249686653137ec273d081371b3672d.zip glibc-4cb334c4d6249686653137ec273d081371b3672d.tar.gz glibc-4cb334c4d6249686653137ec273d081371b3672d.tar.bz2 |
x86: Use AVX2 memcpy/memset on Skylake server [BZ #21396]
On Skylake server, AVX512 load/store instructions in memcpy/memset may
lead to lower CPU turbo frequency in certain situations. Use of AVX2
in memcpy/memset has been observed to have improved overall performance
in many workloads due to the higher frequency.
Since AVX512ER is unique to Xeon Phi, this patch sets Prefer_No_AVX512
if AVX512ER isn't available so that AVX2 versions of memcpy/memset are
used on Skylake server.
[BZ #21396]
* sysdeps/x86/cpu-features.c (init_cpu_features): Set
Prefer_No_AVX512 if AVX512ER isn't available.
* sysdeps/x86/cpu-features.h (bit_arch_Prefer_No_AVX512): New.
(index_arch_Prefer_No_AVX512): Likewise.
* sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Don't use
AVX512 version if Prefer_No_AVX512 is set.
* sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk):
Likewise.
* sysdeps/x86_64/multiarch/memmove.S (__libc_memmove): Likewise.
* sysdeps/x86_64/multiarch/memmove_chk.S (__memmove_chk):
Likewise.
* sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise.
* sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk):
Likewise.
* sysdeps/x86_64/multiarch/memset.S (memset): Likewise.
* sysdeps/x86_64/multiarch/memset_chk.S (__memset_chk):
Likewise.
Diffstat (limited to 'sysdeps/x86_64/multiarch/memset.S')
-rw-r--r-- | sysdeps/x86_64/multiarch/memset.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/sysdeps/x86_64/multiarch/memset.S b/sysdeps/x86_64/multiarch/memset.S index c958b2f..9d33118 100644 --- a/sysdeps/x86_64/multiarch/memset.S +++ b/sysdeps/x86_64/multiarch/memset.S @@ -41,6 +41,8 @@ ENTRY(memset) jnz L(AVX512F) lea __memset_avx2_unaligned(%rip), %RAX_LP L(AVX512F): + HAS_ARCH_FEATURE (Prefer_No_AVX512) + jnz 2f HAS_ARCH_FEATURE (AVX512F_Usable) jz 2f lea __memset_avx512_no_vzeroupper(%rip), %RAX_LP |