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author | H.J. Lu <hjl.tools@gmail.com> | 2018-07-14 05:53:05 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2018-07-14 05:56:46 -0700 |
commit | ebff9c5cfae62e84dbd0456d564bd882818dc15f (patch) | |
tree | bf8bb50ca20fe7cd8adbac896707bd02975ea1ff /sysdeps/x86/sysdep.h | |
parent | 0a83bad2aae6807a108d5bb3eb3389060702265b (diff) | |
download | glibc-ebff9c5cfae62e84dbd0456d564bd882818dc15f.zip glibc-ebff9c5cfae62e84dbd0456d564bd882818dc15f.tar.gz glibc-ebff9c5cfae62e84dbd0456d564bd882818dc15f.tar.bz2 |
x86: Rename __glibc_reserved1 to feature_1 in tcbhead_t [BZ #22563]
feature_1 has X86_FEATURE_1_IBT and X86_FEATURE_1_SHSTK bits for CET
run-time control.
CET_ENABLED, IBT_ENABLED and SHSTK_ENABLED are defined to 1 or 0 to
indicate that if CET, IBT and SHSTK are enabled.
<tls-setup.h> is added to set up thread-local data.
Reviewed-by: Carlos O'Donell <carlos@redhat.com>
[BZ #22563]
* nptl/pthread_create.c: Include <tls-setup.h>.
(__pthread_create_2_1): Call tls_setup_tcbhead.
* sysdeps/generic/tls-setup.h: New file.
* sysdeps/x86/nptl/tls-setup.h: Likewise.
* sysdeps/i386/nptl/tcb-offsets.sym (FEATURE_1_OFFSET): New.
* sysdeps/x86_64/nptl/tcb-offsets.sym (FEATURE_1_OFFSET):
Likewise.
* sysdeps/i386/nptl/tls.h (tcbhead_t): Rename __glibc_reserved1
to feature_1.
* sysdeps/x86_64/nptl/tls.h (tcbhead_t): Likewise.
* sysdeps/x86/sysdep.h (X86_FEATURE_1_IBT): New.
(X86_FEATURE_1_SHSTK): Likewise.
(CET_ENABLED): Likewise.
(IBT_ENABLED): Likewise.
(SHSTK_ENABLED): Likewise.
Diffstat (limited to 'sysdeps/x86/sysdep.h')
-rw-r--r-- | sysdeps/x86/sysdep.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/sysdeps/x86/sysdep.h b/sysdeps/x86/sysdep.h index afcb7cf..976566a 100644 --- a/sysdeps/x86/sysdep.h +++ b/sysdeps/x86/sysdep.h @@ -21,6 +21,33 @@ #include <sysdeps/generic/sysdep.h> +/* __CET__ is defined by GCC with Control-Flow Protection values: + +enum cf_protection_level +{ + CF_NONE = 0, + CF_BRANCH = 1 << 0, + CF_RETURN = 1 << 1, + CF_FULL = CF_BRANCH | CF_RETURN, + CF_SET = 1 << 2 +}; +*/ + +/* Set if CF_BRANCH (IBT) is enabled. */ +#define X86_FEATURE_1_IBT (1U << 0) +/* Set if CF_RETURN (SHSTK) is enabled. */ +#define X86_FEATURE_1_SHSTK (1U << 1) + +#ifdef __CET__ +# define CET_ENABLED 1 +# define IBT_ENABLED (__CET__ & X86_FEATURE_1_IBT) +# define SHSTK_ENABLED (__CET__ & X86_FEATURE_1_SHSTK) +#else +# define CET_ENABLED 0 +# define IBT_ENABLED 0 +# define SHSTK_ENABLED 0 +#endif + #ifdef __ASSEMBLER__ /* Syntactic details of assembler. */ |