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authorDavid S. Miller <davem@davemloft.net>2012-05-11 13:58:41 -0700
committerDavid S. Miller <davem@davemloft.net>2012-05-11 13:58:41 -0700
commit842b81d6113b45c9a10a93dd8415639c414df946 (patch)
tree18668c734d4243b1e721637ab160f9420f18c7ff /sysdeps/sparc/fpu/bits
parent1cf463cd4e499488cbea70c50939d22b6ffc045f (diff)
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Mark sparc %fsr load and store inline asms as volatile.
* sysdeps/sparc/fpu/bits/fenv.h (__fenv_stfsr): Add __volatile__. * sysdeps/sparc/fpu/fpu_control.h (_FPU_GETCW): Likewise. (_FPU_SETCW): Likewise.
Diffstat (limited to 'sysdeps/sparc/fpu/bits')
-rw-r--r--sysdeps/sparc/fpu/bits/fenv.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/sysdeps/sparc/fpu/bits/fenv.h b/sysdeps/sparc/fpu/bits/fenv.h
index 2168de5..0e2a9b9 100644
--- a/sysdeps/sparc/fpu/bits/fenv.h
+++ b/sysdeps/sparc/fpu/bits/fenv.h
@@ -76,9 +76,9 @@ typedef unsigned long int fenv_t;
/* For internal use only: access the fp state register. */
#if __WORDSIZE == 64
-# define __fenv_stfsr(X) __asm__ ("stx %%fsr,%0" : "=m" (X))
+# define __fenv_stfsr(X) __asm__ __volatile__ ("stx %%fsr,%0" : "=m" (X))
# define __fenv_ldfsr(X) __asm__ __volatile__ ("ldx %0,%%fsr" : : "m" (X))
#else
-# define __fenv_stfsr(X) __asm__ ("st %%fsr,%0" : "=m" (X))
+# define __fenv_stfsr(X) __asm__ __volatile__ ("st %%fsr,%0" : "=m" (X))
# define __fenv_ldfsr(X) __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X))
#endif