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author | Joseph Myers <joseph@codesourcery.com> | 2013-06-05 20:44:03 +0000 |
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committer | Joseph Myers <joseph@codesourcery.com> | 2013-06-05 20:44:03 +0000 |
commit | 9c84384cc18ff589233628c193953ca8d7a39f5c (patch) | |
tree | 95d1f5aee409b208db7545d678012eeae9559fae /sysdeps/powerpc/powerpc64/strlen.S | |
parent | 5556231db2301917cd14a7450de4eba2368c9763 (diff) | |
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Remove trailing whitespace.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/strlen.S')
-rw-r--r-- | sysdeps/powerpc/powerpc64/strlen.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/sysdeps/powerpc/powerpc64/strlen.S b/sysdeps/powerpc/powerpc64/strlen.S index dafd033..0f9b5ee 100644 --- a/sysdeps/powerpc/powerpc64/strlen.S +++ b/sysdeps/powerpc/powerpc64/strlen.S @@ -57,11 +57,11 @@ 2) How popular are bytes with the high bit set? If they are very rare, on some processors it might be useful to use the simpler expression ~((x - 0x01010101) | 0x7f7f7f7f) (that is, on processors with only one - ALU), but this fails when any character has its high bit set. - + ALU), but this fails when any character has its high bit set. + Answer: - 1) Added a Data Cache Block Touch early to prefetch the first 128 - byte cache line. Adding dcbt instructions to the loop would not be + 1) Added a Data Cache Block Touch early to prefetch the first 128 + byte cache line. Adding dcbt instructions to the loop would not be effective since most strings will be shorter than the cache line.*/ /* Some notes on register usage: Under the SVR4 ABI, we can use registers @@ -101,7 +101,7 @@ ENTRY (strlen) li rMASK, -1 insrdi r7F7F, r7F7F, 32, 0 /* That's the setup done, now do the first pair of doublewords. - We make an exception and use method (2) on the first two doublewords, + We make an exception and use method (2) on the first two doublewords, to reduce overhead. */ srd rMASK, rMASK, rPADN and rTMP1, r7F7F, rWORD1 |