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authorMatthew Fortune <matthew.fortune@imgtec.com>2014-06-01 00:16:25 +0100
committerMatthew Fortune <matthew.fortune@imgtec.com>2014-12-31 21:09:21 +0000
commit0bd956720c457ff054325b48f26ac7c91cb060e8 (patch)
tree403b4652711dbce685ca37ab835653bee15f93b3 /sysdeps/mips/tst-mode-switch-3.c
parentf59ad976ed979d22637c5187f6a92fbbd8c191e4 (diff)
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Add support for MIPS O32 FPXX and .MIPS.abiflags
* elf/elf.h (PT_MIPS_ABIFLAGS): Define. (Elf_MIPS_ABIFlags_v0): New structure. (EF_MIPS_FP64): Define. (MIPS_AFL_REG_NONE, MIPS_AFL_REG_32, MIPS_AFL_REG_64): Likewise. (MIPS_AFL_REG_128, MIPS_AFL_ASE_DSP, MIPS_AFL_ASE_DSP64): Likewise. (MIPS_AFL_ASE_DSPR2, MIPS_AFL_ASE_EVA, MIPS_AFL_ASE_MCU): Likewise. (MIPS_AFL_ASE_MDMX, MIPS_AFL_ASE_MIPS3D, MIPS_AFL_ASE_MT): Likewise. (MIPS_AFL_ASE_SMARTMIPS, MIPS_AFL_ASE_VIRT): Likewise. (MIPS_AFL_ASE_VIRT64, MIPS_AFL_ASE_MSA, MIPS_AFL_ASE_MSA64): Likewise. (MIPS_AFL_ASE_MIPS16, MIPS_AFL_ASE_MICROMIPS): Likewise. (MIPS_AFL_ASE_XPA, MIPS_AFL_EXT_XLR, MIPS_AFL_EXT_OCTEON2): Likewise. (MIPS_AFL_EXT_OCTEONP, MIPS_AFL_EXT_LOONGSON_3A): Likewise. (MIPS_AFL_EXT_OCTEON, MIPS_AFL_EXT_5900, MIPS_AFL_EXT_4010): Likewise. (MIPS_AFL_EXT_4100, MIPS_AFL_EXT_3900, MIPS_AFL_EXT_10000): Likewise. (MIPS_AFL_EXT_SB1, MIPS_AFL_EXT_4111, MIPS_AFL_EXT_4120): Likewise. (MIPS_AFL_EXT_5400, MIPS_AFL_EXT_5500): Likewise. (MIPS_AFL_EXT_LOONGSON_2E, MIPS_AFL_EXT_LOONGSON_2F): Likewise. (Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE): New enum values. (Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT): Likewise. (Val_GNU_MIPS_ABI_FP_OLD_64, Val_GNU_MIPS_ABI_FP_XX): Likewise. (Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A): Likewise. (Val_GNU_MIPS_ABI_FP_MAX): Likewise. * sysdeps/mips/Makefile [subdir=elf]: Add tst-abi-interlink, tst-mode-switch-1, tst-mode-switch-2, tst-mode-switch-3 tests. * sysdeps/mips/bits/linkmap.h (struct link_map_machine): Add fpmode field. * sysdeps/mips/dl-machine.h (elf_machine_matches_host): Reject EF_MIPS_FP64. * sysdeps/mips/dl-machine-reject-phdr.h: New file. * sysdeps/mips/tst-abi-fp32mod.c: Likewise. * sysdeps/mips/tst-abi-fpxxmod.c: Likewise. * sysdeps/mips/tst-abi-fpxxomod.c: Likewise. * sysdeps/mips/tst-abi-fp64mod.c: Likewise. * sysdeps/mips/tst-abi-fp64amod.c: Likewise. * sysdeps/mips/tst-abi-interlink.c: Likewise. * sysdeps/mips/tst-mode-switch-1.c: Likewise. * sysdeps/mips/tst-mode-switch-2.c: Likewise. * sysdeps/mips/tst-mode-switch-3.c: Likewise. * sysdeps/unix/sysv/linux/mips/configure.ac (o32-fpabi): Define to record the current FP ABI extension. (mips-mode-switch): Define to show if kernel headers support mode switching. * sysdeps/unix/sysv/linux/mips/configure: Regenerate. * sysdeps/unix/sysv/linux/mips/ldsodefs.h: Increase maximum supported SYSV ABI version to 3. * sysdeps/unix/sysv/linux/mips/libc-abis: Add new MIPS_O32_FP64 feature.
Diffstat (limited to 'sysdeps/mips/tst-mode-switch-3.c')
-rw-r--r--sysdeps/mips/tst-mode-switch-3.c90
1 files changed, 90 insertions, 0 deletions
diff --git a/sysdeps/mips/tst-mode-switch-3.c b/sysdeps/mips/tst-mode-switch-3.c
new file mode 100644
index 0000000..9cc725b
--- /dev/null
+++ b/sysdeps/mips/tst-mode-switch-3.c
@@ -0,0 +1,90 @@
+/* Copyright (C) 2014 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <setjmp.h>
+#include <sys/prctl.h>
+
+#if __mips_fpr != 0 || _MIPS_SPFPSET != 16
+# error This test requires -mfpxx -mno-odd-spreg
+#endif
+
+/* This test verifies that mode changes between a setjmp and longjmp do
+ not corrupt the state of callee-saved registers. */
+
+static int mode[6] =
+ {
+ 0,
+ PR_FP_MODE_FR,
+ PR_FP_MODE_FR | PR_FP_MODE_FRE,
+ PR_FP_MODE_FR,
+ 0,
+ PR_FP_MODE_FR | PR_FP_MODE_FRE
+ };
+static jmp_buf env;
+float check1 = 2.0;
+double check2 = 3.0;
+
+int
+main (void)
+{
+ int i;
+ int result = 0;
+
+ for (i = 0 ; i < 7 ; i++)
+ {
+ int retval;
+ register float test1 __asm ("$f20");
+ register double test2 __asm ("$f22");
+
+ /* Hide what we are doing to $f20 and $f22 from the compiler. */
+ __asm __volatile ("l.s %0,%2\n"
+ "l.d %1,%3\n"
+ : "=f" (test1), "=f" (test2)
+ : "m" (check1), "m" (check2));
+
+ retval = setjmp (env);
+
+ /* Make sure the compiler knows we want to access the variables
+ via the named registers again. */
+ __asm __volatile ("" : : "f" (test1), "f" (test2));
+
+ if (test1 != check1 || test2 != check2)
+ {
+ printf ("Corrupt register detected: $20 %f = %f, $22 %f = %f\n",
+ test1, check1, test2, check2);
+ result = 1;
+ }
+
+ if (retval == 0)
+ {
+ if (prctl (PR_SET_FP_MODE, mode[i % 6]) != 0
+ && errno != ENOTSUP)
+ {
+ printf ("prctl PR_SET_FP_MODE failed: %m");
+ exit (1);
+ }
+ longjmp (env, 0);
+ }
+ }
+
+ return result;
+}