diff options
| author | H.J. Lu <hjl.tools@gmail.com> | 2023-08-28 12:08:14 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2023-08-29 12:57:41 -0700 |
| commit | 1493622f4f9048ffede3fbedb64695efa49d662a (patch) | |
| tree | 8d9d94a93ab1ab088b5e011eccabf97bf5b2cbb9 /sysdeps/mips/regdef.h | |
| parent | e1d3312015e8f70344620375aedf91afe7e7e7a4 (diff) | |
| download | glibc-1493622f4f9048ffede3fbedb64695efa49d662a.zip glibc-1493622f4f9048ffede3fbedb64695efa49d662a.tar.gz glibc-1493622f4f9048ffede3fbedb64695efa49d662a.tar.bz2 | |
x86: Check the lower byte of EAX of CPUID leaf 2 [BZ #30643]
The old Intel software developer manual specified that the low byte of
EAX of CPUID leaf 2 returned 1 which indicated the number of rounds of
CPUDID leaf 2 was needed to retrieve the complete cache information. The
newer Intel manual has been changed to that it should always return 1
and be ignored. If the lower byte isn't 1, CPUID leaf 2 can't be used.
In this case, we ignore CPUID leaf 2 and use CPUID leaf 4 instead. If
CPUID leaf 4 doesn't contain the cache information, cache information
isn't available at all. This addresses BZ #30643.
Diffstat (limited to 'sysdeps/mips/regdef.h')
0 files changed, 0 insertions, 0 deletions