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| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2024-05-16 09:21:24 +0100 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2024-05-21 14:38:49 +0100 |
| commit | 0fed0b250f728f38bca5f6fba1dcecdccfc6a44e (patch) | |
| tree | f0ef0507799bcdd093a89c12b280d8dddb0f3b55 /sysdeps/aarch64/fpu/test-float-sve-wrappers.c | |
| parent | c39cf53702e570b64a70d8f7fdfe277017acfb5f (diff) | |
| download | glibc-0fed0b250f728f38bca5f6fba1dcecdccfc6a44e.zip glibc-0fed0b250f728f38bca5f6fba1dcecdccfc6a44e.tar.gz glibc-0fed0b250f728f38bca5f6fba1dcecdccfc6a44e.tar.bz2 | |
aarch64/fpu: Add vector variants of pow
Plus a small amount of moving includes around in order to be able to
remove duplicate definition of asuint64.
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/aarch64/fpu/test-float-sve-wrappers.c')
| -rw-r--r-- | sysdeps/aarch64/fpu/test-float-sve-wrappers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sysdeps/aarch64/fpu/test-float-sve-wrappers.c b/sysdeps/aarch64/fpu/test-float-sve-wrappers.c index 5b3dd22..0f972b7 100644 --- a/sysdeps/aarch64/fpu/test-float-sve-wrappers.c +++ b/sysdeps/aarch64/fpu/test-float-sve-wrappers.c @@ -63,6 +63,7 @@ SVE_VECTOR_WRAPPER (logf_sve, _ZGVsMxv_logf) SVE_VECTOR_WRAPPER (log10f_sve, _ZGVsMxv_log10f) SVE_VECTOR_WRAPPER (log1pf_sve, _ZGVsMxv_log1pf) SVE_VECTOR_WRAPPER (log2f_sve, _ZGVsMxv_log2f) +SVE_VECTOR_WRAPPER_ff (powf_sve, _ZGVsMxvv_powf) SVE_VECTOR_WRAPPER (sinf_sve, _ZGVsMxv_sinf) SVE_VECTOR_WRAPPER (sinhf_sve, _ZGVsMxv_sinhf) SVE_VECTOR_WRAPPER (tanf_sve, _ZGVsMxv_tanf) |