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| author | Joe Ramsay <Joe.Ramsay@arm.com> | 2024-02-20 16:59:39 +0000 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2024-04-04 10:32:52 +0100 |
| commit | bdb5705b7bab618ed4445f4b17d4b1e4fbbf94a7 (patch) | |
| tree | f40e3e851520b89633b5bc58471b25e8cd7f6e8c /sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | |
| parent | cb5d84f1f8527116a724e729b98412567eed6404 (diff) | |
| download | glibc-bdb5705b7bab618ed4445f4b17d4b1e4fbbf94a7.zip glibc-bdb5705b7bab618ed4445f4b17d4b1e4fbbf94a7.tar.gz glibc-bdb5705b7bab618ed4445f4b17d4b1e4fbbf94a7.tar.bz2 | |
aarch64/fpu: Add vector variants of cosh
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
Diffstat (limited to 'sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c')
| -rw-r--r-- | sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c index 33ae928..3545299 100644 --- a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c +++ b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c @@ -28,6 +28,7 @@ VPCS_VECTOR_WRAPPER (asinf_advsimd, _ZGVnN4v_asinf) VPCS_VECTOR_WRAPPER (atanf_advsimd, _ZGVnN4v_atanf) VPCS_VECTOR_WRAPPER_ff (atan2f_advsimd, _ZGVnN4vv_atan2f) VPCS_VECTOR_WRAPPER (cosf_advsimd, _ZGVnN4v_cosf) +VPCS_VECTOR_WRAPPER (coshf_advsimd, _ZGVnN4v_coshf) VPCS_VECTOR_WRAPPER (erff_advsimd, _ZGVnN4v_erff) VPCS_VECTOR_WRAPPER (expf_advsimd, _ZGVnN4v_expf) VPCS_VECTOR_WRAPPER (exp10f_advsimd, _ZGVnN4v_exp10f) |