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author | Joe Ramsay <Joe.Ramsay@arm.com> | 2023-11-16 13:24:18 +0000 |
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committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2023-11-20 17:53:14 +0000 |
commit | a8830c928540011120ac742d632ed51d52af01df (patch) | |
tree | 3c219e1d2abfb616ebb3a512bcccabcd415dab29 /sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | |
parent | 65341f7bbea824d2ff9d37db15d8be162df42bd3 (diff) | |
download | glibc-a8830c928540011120ac742d632ed51d52af01df.zip glibc-a8830c928540011120ac742d632ed51d52af01df.tar.gz glibc-a8830c928540011120ac742d632ed51d52af01df.tar.bz2 |
aarch64: Add vector implementations of expm1 routines
May discard sign of 0 - auto tests for -0 and -0x1p-10000 updated accordingly.
Diffstat (limited to 'sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c')
-rw-r--r-- | sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c index 446fd7f..26d9e98 100644 --- a/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c +++ b/sysdeps/aarch64/fpu/test-float-advsimd-wrappers.c @@ -31,6 +31,7 @@ VPCS_VECTOR_WRAPPER (cosf_advsimd, _ZGVnN4v_cosf) VPCS_VECTOR_WRAPPER (expf_advsimd, _ZGVnN4v_expf) VPCS_VECTOR_WRAPPER (exp10f_advsimd, _ZGVnN4v_exp10f) VPCS_VECTOR_WRAPPER (exp2f_advsimd, _ZGVnN4v_exp2f) +VPCS_VECTOR_WRAPPER (expm1f_advsimd, _ZGVnN4v_expm1f) VPCS_VECTOR_WRAPPER (logf_advsimd, _ZGVnN4v_logf) VPCS_VECTOR_WRAPPER (log10f_advsimd, _ZGVnN4v_log10f) VPCS_VECTOR_WRAPPER (log1pf_advsimd, _ZGVnN4v_log1pf) |