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| author | H.J. Lu <hjl.tools@gmail.com> | 2020-12-21 19:56:10 -0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-12-22 03:45:47 -0800 |
| commit | a2e5da2cf471b5ac849bcd7d9960466b9cd28a35 (patch) | |
| tree | 0f95762c888a25956bf87d3437fa27145a3a7f50 /manual | |
| parent | bca0283815375fd3e8cb13f7dcae5eb4b2e5f5c2 (diff) | |
| download | glibc-a2e5da2cf471b5ac849bcd7d9960466b9cd28a35.zip glibc-a2e5da2cf471b5ac849bcd7d9960466b9cd28a35.tar.gz glibc-a2e5da2cf471b5ac849bcd7d9960466b9cd28a35.tar.bz2 | |
<sys/platform/x86.h>: Add Intel LAM support
Add Intel Linear Address Masking (LAM) support to <sys/platform/x86.h>.
HAS_CPU_FEATURE (LAM) can be used to detect if LAM is enabled in CPU.
LAM modifies the checking that is applied to 64-bit linear addresses,
allowing software to use of the untranslated address bits for metadata.
Diffstat (limited to 'manual')
| -rw-r--r-- | manual/platform.texi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/manual/platform.texi b/manual/platform.texi index 8fec293..b67683a 100644 --- a/manual/platform.texi +++ b/manual/platform.texi @@ -378,6 +378,9 @@ the indirect branch predictor barrier (IBPB). @code{KL} -- AES Key Locker instructions. @item +@code{LAM} -- Linear Address Masking. + +@item @code{L1D_FLUSH} -- IA32_FLUSH_CMD MSR. @item |