diff options
author | Joseph Myers <joseph@codesourcery.com> | 2016-05-24 21:11:18 +0000 |
---|---|---|
committer | Joseph Myers <joseph@codesourcery.com> | 2016-05-24 21:11:18 +0000 |
commit | 5ff81530dd14552a48a8fcb119e5867a1b504cc6 (patch) | |
tree | cea85f8f7867675eda9708b762ca2b8ab1ebbc52 /iconvdata | |
parent | 7cfcb778c9cc6ad3c3b5ac2dbb2308e81ba3235b (diff) | |
download | glibc-5ff81530dd14552a48a8fcb119e5867a1b504cc6.zip glibc-5ff81530dd14552a48a8fcb119e5867a1b504cc6.tar.gz glibc-5ff81530dd14552a48a8fcb119e5867a1b504cc6.tar.bz2 |
Do not raise "inexact" from x86_64 SSE4.1 ceil, floor (bug 15479).
Continuing fixes for ceil and floor functions not to raise the
"inexact" exception, this patch fixes the x86_64 SSE4.1 versions. The
roundss / roundsd instructions take an immediate operand that
determines the rounding mode and whether to raise "inexact"; this just
needs bit 3 set to disable "inexact", which this patch does.
Remark: we don't have an SSE4.1 version of trunc / truncf (using this
instruction with operand 11); I'd expect one to make sense, but of
course it should be benchmarked against the existing C code. I'll
file a bug in Bugzilla for the lack of such a version.
Tested for x86_64.
[BZ #15479]
* sysdeps/x86_64/fpu/multiarch/s_ceil.S (__ceil_sse41): Set bit 3
of immediate operand to rounding instruction.
* sysdeps/x86_64/fpu/multiarch/s_ceilf.S (__ceilf_sse41):
Likewise.
* sysdeps/x86_64/fpu/multiarch/s_floor.S (__floor_sse41):
Likewise.
* sysdeps/x86_64/fpu/multiarch/s_floorf.S (__floorf_sse41):
Likewise.
Diffstat (limited to 'iconvdata')
0 files changed, 0 insertions, 0 deletions