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# Makefile template for Configure for the MIPS simulator.
# Written by Cygnus Support.
## COMMON_PRE_CONFIG_FRAG
SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@
SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@
SIM_MIPS_GEN = @SIM_MIPS_GEN@
SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@
SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@
SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@
arch = mips
# Object files created by various simulator generators.
SIM_SINGLE_OBJ = \
support.o \
itable.o \
semantics.o \
idecode.o \
icache.o \
engine.o \
irun.o \
SIM_M16_OBJ = \
m16_support.o \
m16_semantics.o \
m16_idecode.o \
m16_icache.o \
\
m32_support.o \
m32_semantics.o \
m32_idecode.o \
m32_icache.o \
\
itable.o \
m16run.o \
SIM_MULTI_OBJ = $(SIM_MIPS_MULTI_OBJ) \
itable.o \
multi-run.o \
SIM_OBJS = \
interp.o \
$(SIM_$(SIM_MIPS_GEN)_OBJ) \
$(SIM_NEW_COMMON_OBJS) \
cp1.o \
mdmx.o \
dsp.o \
sim-main.o \
sim-resume.o \
# List of flags to always pass to $(CC).
SIM_EXTRA_CFLAGS = @SIM_MIPS_SUBTARGET@
SIM_BITSIZE = -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1
SIM_FLOAT = -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
SIM_EXTRA_CLEAN = clean-extra
all: $(SIM_$(SIM_MIPS_GEN)_ALL)
## COMMON_POST_CONFIG_FRAG
IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
IGEN_INSN=$(srcdir)/mips.igen
IGEN_DC=$(srcdir)/mips.dc
M16_DC=$(srcdir)/m16.dc
MICROMIPS32_DC=$(srcdir)/micromips.dc
MICROMIPS16_DC=$(srcdir)/micromips16.dc
IGEN_INCLUDE=\
$(srcdir)/micromipsdsp.igen \
$(srcdir)/micromips.igen \
$(srcdir)/m16.igen \
$(srcdir)/m16e.igen \
$(srcdir)/mdmx.igen \
$(srcdir)/mips3d.igen \
$(srcdir)/sb1.igen \
$(srcdir)/tx.igen \
$(srcdir)/vr.igen \
$(srcdir)/dsp.igen \
$(srcdir)/dsp2.igen \
$(srcdir)/mips3264r2.igen \
$(srcdir)/mips3264r6.igen \
SIM_SINGLE_ALL = tmp-single
SIM_M16_ALL = tmp-m16
SIM_MULTI_ALL = tmp-multi
BUILT_SRC_FROM_SINGLE = \
icache.h \
icache.c \
idecode.h \
idecode.c \
semantics.h \
semantics.c \
model.h \
model.c \
support.h \
support.c \
engine.h \
engine.c \
irun.c \
$(BUILT_SRC_FROM_SINGLE): tmp-single
tmp-single: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
$(ECHO_IGEN) $(IGEN_RUN) \
$(IGEN_TRACE) \
-I $(srcdir) \
-Werror \
-Wnodiscard \
$(SIM_MIPS_SINGLE_FLAGS) \
-G gen-direct-access \
-G gen-zero-r0 \
-B 32 \
-H 31 \
-i $(IGEN_INSN) \
-o $(IGEN_DC) \
-x \
-n icache.h -hc icache.h \
-n icache.c -c icache.c \
-n semantics.h -hs semantics.h \
-n semantics.c -s semantics.c \
-n idecode.h -hd idecode.h \
-n idecode.c -d idecode.c \
-n model.h -hm model.h \
-n model.c -m model.c \
-n support.h -hf support.h \
-n support.c -f support.c \
-n engine.h -he engine.h \
-n engine.c -e engine.c \
-n irun.c -r irun.c
$(SILENCE) touch $@
BUILT_SRC_FROM_M16 = \
m16_icache.h \
m16_icache.c \
m16_idecode.h \
m16_idecode.c \
m16_semantics.h \
m16_semantics.c \
m16_model.h \
m16_model.c \
m16_support.h \
m16_support.c \
\
m32_icache.h \
m32_icache.c \
m32_idecode.h \
m32_idecode.c \
m32_semantics.h \
m32_semantics.c \
m32_model.h \
m32_model.c \
m32_support.h \
m32_support.c \
$(BUILT_SRC_FROM_M16): tmp-m16
tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
$(ECHO_IGEN) $(IGEN_RUN) \
$(IGEN_TRACE) \
-I $(srcdir) \
-Werror \
-Wnodiscard \
$(SIM_MIPS_M16_FLAGS) \
-G gen-direct-access \
-G gen-zero-r0 \
-B 16 \
-H 15 \
-i $(IGEN_INSN) \
-o $(M16_DC) \
-P m16_ \
-x \
-n m16_icache.h -hc m16_icache.h \
-n m16_icache.c -c m16_icache.c \
-n m16_semantics.h -hs m16_semantics.h \
-n m16_semantics.c -s m16_semantics.c \
-n m16_idecode.h -hd m16_idecode.h \
-n m16_idecode.c -d m16_idecode.c \
-n m16_model.h -hm m16_model.h \
-n m16_model.c -m m16_model.c \
-n m16_support.h -hf m16_support.h \
-n m16_support.c -f m16_support.c \
#
$(ECHO_IGEN) $(IGEN_RUN) \
$(IGEN_TRACE) \
-I $(srcdir) \
-Werror \
-Wnodiscard \
$(SIM_MIPS_SINGLE_FLAGS) \
-G gen-direct-access \
-G gen-zero-r0 \
-B 32 \
-H 31 \
-i $(IGEN_INSN) \
-o $(IGEN_DC) \
-P m32_ \
-x \
-n m32_icache.h -hc m32_icache.h \
-n m32_icache.c -c m32_icache.c \
-n m32_semantics.h -hs m32_semantics.h \
-n m32_semantics.c -s m32_semantics.c \
-n m32_idecode.h -hd m32_idecode.h \
-n m32_idecode.c -d m32_idecode.c \
-n m32_model.h -hm m32_model.h \
-n m32_model.c -m m32_model.c \
-n m32_support.h -hf m32_support.h \
-n m32_support.c -f m32_support.c \
#
$(SILENCE) touch $@
BUILT_SRC_FROM_MULTI = $(SIM_MIPS_MULTI_SRC)
$(BUILT_SRC_FROM_MULTI): tmp-multi
tmp-multi: tmp-mach-multi tmp-run-multi
tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE)
for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
p=`echo $${t} | sed -e 's/:.*//'` ; \
m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
f=`echo $${t} | sed -e 's/.*://'` ; \
case $${p} in \
micromips16*) e="-B 16 -H 15 -o $(MICROMIPS16_DC) -F 16" ;; \
micromips32* | micromips64*) \
e="-B 32 -H 31 -o $(MICROMIPS32_DC) -F $${f}" ;; \
micromips_m32*) \
e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
micromips_m64*) \
e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \
m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \
*) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \
esac; \
$(IGEN_RUN) \
$(IGEN_TRACE) \
$${e} \
-I $(srcdir) \
-Werror \
-Wnodiscard \
-M $${m} \
-G gen-direct-access \
-G gen-zero-r0 \
-i $(IGEN_INSN) \
-P $${p}_ \
-x \
-n $${p}_icache.h -hc $${p}_icache.h \
-n $${p}_icache.c -c $${p}_icache.c \
-n $${p}_semantics.h -hs $${p}_semantics.h \
-n $${p}_semantics.c -s $${p}_semantics.c \
-n $${p}_idecode.h -hd $${p}_idecode.h \
-n $${p}_idecode.c -d $${p}_idecode.c \
-n $${p}_model.h -hm $${p}_model.h \
-n $${p}_model.c -m $${p}_model.c \
-n $${p}_support.h -hf $${p}_support.h \
-n $${p}_support.c -f $${p}_support.c \
-n $${p}_engine.h -he $${p}_engine.h \
-n $${p}_engine.c -e $${p}_engine.c \
|| exit; \
done
$(SILENCE) touch $@
tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c
for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
case $${t} in \
m16*) \
m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
sed < $(srcdir)/m16run.c > tmp-run \
-e "s/^sim_/m16$${m}_/" \
-e "/include/s/sim-engine/m16$${m}_engine/" \
-e "s/m16_/m16$${m}_/" \
-e "s/m32_/m32$${m}_/" ; \
$(SHELL) $(srcdir)/../../move-if-change tmp-run \
m16$${m}_run.c ; \
;;\
micromips32*) \
m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
sed < $(srcdir)/micromipsrun.c > tmp-run \
-e "s/^sim_/micromips32$${m}_/" \
-e "/include/s/sim-engine/micromips32$${m}_engine/" \
-e "s/micromips16_/micromips16$${m}_/" \
-e "s/micromips32_/micromips32$${m}_/" \
-e "s/m32_/m32$${m}_/" ; \
$(SHELL) $(srcdir)/../../move-if-change tmp-run \
micromips$${m}_run.c ; \
;;\
micromips64*) \
m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
sed < $(srcdir)/micromipsrun.c > tmp-run \
-e "s/^sim_/micromips64$${m}_/" \
-e "/include/s/sim-engine/micromips64$${m}_engine/" \
-e "s/micromips16_/micromips16$${m}_/" \
-e "s/micromips32_/micromips64$${m}_/" \
-e "s/m32_/m64$${m}_/" ; \
$(SHELL) $(srcdir)/../../move-if-change tmp-run \
micromips$${m}_run.c ; \
;;\
esac \
done
$(SILENCE) touch $@
clean-extra:
rm -f $(BUILT_SRC_FROM_SINGLE)
rm -f $(BUILT_SRC_FROM_M16)
rm -f $(BUILT_SRC_FROM_MULTI)
rm -f tmp-*
rm -f micromips16*.o micromips32*.o m16*.o m32*.o
|
