1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
|
/* TI PRU disassemble routines
Copyright (C) 2014-2022 Free Software Foundation, Inc.
Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
This file is part of the GNU opcodes library.
This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with this file; see the file COPYING. If not, write to the
Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "disassemble.h"
#include "opcode/pru.h"
#include "libiberty.h"
#include <string.h>
#include <assert.h>
/* No symbol table is available when this code runs out in an embedded
system as when it is used for disassembler support in a monitor. */
#if !defined (EMBEDDED_ENV)
#define SYMTAB_AVAILABLE 1
#include "elf-bfd.h"
#include "elf/pru.h"
#endif
/* Length of PRU instruction in bytes. */
#define INSNLEN 4
/* Return a pointer to an pru_opcode struct for a given instruction
opcode, or NULL if there is an error. */
const struct pru_opcode *
pru_find_opcode (unsigned long opcode)
{
const struct pru_opcode *p;
const struct pru_opcode *op = NULL;
const struct pru_opcode *pseudo_op = NULL;
for (p = pru_opcodes; p < &pru_opcodes[NUMOPCODES]; p++)
{
if ((p->mask & opcode) == p->match)
{
if ((p->pinfo & PRU_INSN_MACRO) == PRU_INSN_MACRO)
pseudo_op = p;
else if ((p->pinfo & PRU_INSN_LDI32) == PRU_INSN_LDI32)
/* ignore - should be caught with regular patterns */;
else
op = p;
}
}
return pseudo_op ? pseudo_op : op;
}
/* There are 32 regular registers, each with 8 possible subfield selectors. */
#define NUMREGNAMES (32 * 8)
static void
pru_print_insn_arg_reg (unsigned int r, unsigned int sel,
disassemble_info *info)
{
unsigned int i = r * RSEL_NUM_ITEMS + sel;
assert (i < (unsigned int)pru_num_regs);
assert (i < NUMREGNAMES);
(*info->fprintf_func) (info->stream, "%s", pru_regs[i].name);
}
/* The function pru_print_insn_arg uses the character pointed
to by ARGPTR to determine how it print the next token or separator
character in the arguments to an instruction. */
static int
pru_print_insn_arg (const char *argptr,
unsigned long opcode, bfd_vma address,
disassemble_info *info)
{
long offs = 0;
unsigned long i = 0;
unsigned long io = 0;
switch (*argptr)
{
case ',':
(*info->fprintf_func) (info->stream, "%c ", *argptr);
break;
case 'd':
pru_print_insn_arg_reg (GET_INSN_FIELD (RD, opcode),
GET_INSN_FIELD (RDSEL, opcode),
info);
break;
case 'D':
/* The first 4 values for RDB and RSEL are the same, so we
can reuse some code. */
pru_print_insn_arg_reg (GET_INSN_FIELD (RD, opcode),
GET_INSN_FIELD (RDB, opcode),
info);
break;
case 's':
pru_print_insn_arg_reg (GET_INSN_FIELD (RS1, opcode),
GET_INSN_FIELD (RS1SEL, opcode),
info);
break;
case 'S':
pru_print_insn_arg_reg (GET_INSN_FIELD (RS1, opcode),
RSEL_31_0,
info);
break;
case 'b':
io = GET_INSN_FIELD (IO, opcode);
if (io)
{
i = GET_INSN_FIELD (IMM8, opcode);
(*info->fprintf_func) (info->stream, "%ld", i);
}
else
{
pru_print_insn_arg_reg (GET_INSN_FIELD (RS2, opcode),
GET_INSN_FIELD (RS2SEL, opcode),
info);
}
break;
case 'B':
io = GET_INSN_FIELD (IO, opcode);
if (io)
{
i = GET_INSN_FIELD (IMM8, opcode) + 1;
(*info->fprintf_func) (info->stream, "%ld", i);
}
else
{
pru_print_insn_arg_reg (GET_INSN_FIELD (RS2, opcode),
GET_INSN_FIELD (RS2SEL, opcode),
info);
}
break;
case 'j':
io = GET_INSN_FIELD (IO, opcode);
if (io)
{
/* For the sake of pretty-printing, dump text addresses with
their "virtual" offset that we use for distinguishing
PMEM vs DMEM. This is needed for printing the correct text
labels. */
bfd_vma text_offset = address & ~0x3fffff;
i = GET_INSN_FIELD (IMM16, opcode) * 4;
(*info->print_address_func) (i + text_offset, info);
}
else
{
pru_print_insn_arg_reg (GET_INSN_FIELD (RS2, opcode),
GET_INSN_FIELD (RS2SEL, opcode),
info);
}
break;
case 'W':
i = GET_INSN_FIELD (IMM16, opcode);
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'o':
offs = GET_BROFF_SIGNED (opcode) * 4;
(*info->print_address_func) (address + offs, info);
break;
case 'O':
offs = GET_INSN_FIELD (LOOP_JMPOFFS, opcode) * 4;
(*info->print_address_func) (address + offs, info);
break;
case 'l':
i = GET_BURSTLEN (opcode);
if (i < LSSBBO_BYTECOUNT_R0_BITS7_0)
(*info->fprintf_func) (info->stream, "%ld", i + 1);
else
{
i -= LSSBBO_BYTECOUNT_R0_BITS7_0;
(*info->fprintf_func) (info->stream, "r0.b%ld", i);
}
break;
case 'n':
i = GET_INSN_FIELD (XFR_LENGTH, opcode);
if (i < LSSBBO_BYTECOUNT_R0_BITS7_0)
(*info->fprintf_func) (info->stream, "%ld", i + 1);
else
{
i -= LSSBBO_BYTECOUNT_R0_BITS7_0;
(*info->fprintf_func) (info->stream, "r0.b%ld", i);
}
break;
case 'c':
i = GET_INSN_FIELD (CB, opcode);
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'w':
i = GET_INSN_FIELD (WAKEONSTATUS, opcode);
(*info->fprintf_func) (info->stream, "%ld", i);
break;
case 'x':
i = GET_INSN_FIELD (XFR_WBA, opcode);
(*info->fprintf_func) (info->stream, "%ld", i);
break;
default:
(*info->fprintf_func) (info->stream, "unknown");
break;
}
return 0;
}
/* pru_disassemble does all the work of disassembling a PRU
instruction opcode. */
static int
pru_disassemble (bfd_vma address, unsigned long opcode,
disassemble_info *info)
{
const struct pru_opcode *op;
info->bytes_per_line = INSNLEN;
info->bytes_per_chunk = INSNLEN;
info->display_endian = info->endian;
info->insn_info_valid = 1;
info->branch_delay_insns = 0;
info->data_size = 0;
info->insn_type = dis_nonbranch;
info->target = 0;
info->target2 = 0;
/* Find the major opcode and use this to disassemble
the instruction and its arguments. */
op = pru_find_opcode (opcode);
if (op != NULL)
{
(*info->fprintf_func) (info->stream, "%s", op->name);
const char *argstr = op->args;
if (argstr != NULL && *argstr != '\0')
{
(*info->fprintf_func) (info->stream, "\t");
while (*argstr != '\0')
{
pru_print_insn_arg (argstr, opcode, address, info);
++argstr;
}
}
}
else
{
/* Handle undefined instructions. */
info->insn_type = dis_noninsn;
(*info->fprintf_func) (info->stream, "0x%lx", opcode);
}
/* Tell the caller how far to advance the program counter. */
return INSNLEN;
}
/* print_insn_pru is the main disassemble function for PRU. */
int
print_insn_pru (bfd_vma address, disassemble_info *info)
{
bfd_byte buffer[INSNLEN];
int status;
status = (*info->read_memory_func) (address, buffer, INSNLEN, info);
if (status == 0)
{
unsigned long insn;
insn = (unsigned long) bfd_getl32 (buffer);
status = pru_disassemble (address, insn, info);
}
else
{
(*info->memory_error_func) (status, address, info);
status = -1;
}
return status;
}
|
