| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-12-23 | Support Intel AVX10.2 minmax, vector copy and compare instructions | Haochen Jiang | 1 | -176/+378 |
| 2024-12-18 | Support Intel SM4 AVX10.2 extension | Haochen Jiang | 1 | -9052/+9076 |
| 2024-12-05 | Support Intel AVX10.2 satcvt instructions | Hu, Lin1 | 1 | -1/+393 |
| 2024-12-03 | Support Intel AVX10.2 BF16 instructions | Kong Lingling | 1 | -1/+413 |
| 2024-11-29 | x86: SETcc doesn't permit W suffix | Jan Beulich | 1 | -30/+30 |
| 2024-11-19 | Support x86 Intel MSR_IMM | Hu, Lin1 | 1 | -435/+455 |
| 2024-11-18 | x86: rename SPACE_{,E}VEX_MAP<N> | Jan Beulich | 1 | -652/+652 |
| 2024-11-18 | x86: VP2INTERSECT{D,Q} have mask register destination group | Jan Beulich | 1 | -2/+2 |
| 2024-10-30 | x86/APX: support JMPABS also in assembler | Jan Beulich | 1 | -254/+271 |
| 2024-10-29 | x86: use <xyz> for VFPCLASSP{S,D} | Jan Beulich | 1 | -30/+30 |
| 2024-10-18 | x86: Regenerate missing table files | MayShao-oc | 1 | -1666/+1693 |
| 2024-10-16 | Support Intel AVX10.2 convert instructions | Liwei Xu | 1 | -1/+412 |
| 2024-10-11 | Support Intel AVX10.2 media instructions | Haochen Jiang | 1 | -162/+333 |
| 2024-09-27 | x86: optimize {,V}INSERTPS with certain immediates | Jan Beulich | 1 | -4/+4 |
| 2024-09-27 | x86: optimize {,V}EXTRACT{F,I}{128,32x{4,8},64x{2,4}} with immediate 0 | Jan Beulich | 1 | -10/+10 |
| 2024-09-27 | x86: optimize {,V}EXTRACTPS with immediate 0 | Jan Beulich | 1 | -6/+6 |
| 2024-09-26 | x86: templatize SIMD narrowing-move templates | Jan Beulich | 1 | -9/+9 |
| 2024-09-26 | x86: templatize SIMD sign-/zero-extension templates | Jan Beulich | 1 | -191/+191 |
| 2024-09-26 | x86: templatize SIMD FP binary-logic templates | Jan Beulich | 1 | -266/+266 |
| 2024-09-26 | x86: further templatize FMA templates | Jan Beulich | 1 | -333/+333 |
| 2024-09-26 | x86: templatize SIMD FP arithmetic templates | Jan Beulich | 1 | -1084/+1084 |
| 2024-09-18 | x86/APX: Don't promote AVX/AVX2 instructions out of APX spec | H.J. Lu | 1 | -321/+197 |
| 2024-09-06 | x86/APX: use D for 2-operand CFCMOVcc | Jan Beulich | 1 | -575/+275 |
| 2024-09-06 | x86/APX: optimize certain reg-only CFCMOVcc forms | Jan Beulich | 1 | -30/+30 |
| 2024-09-06 | x86: templatize VNNI templates | Jan Beulich | 1 | -20/+20 |
| 2024-09-02 | Support ymm rounding control for Intel AVX10.2 | Haochen Jiang | 1 | -179/+179 |
| 2024-08-30 | x86: limit RegRex64 use | Jan Beulich | 1 | -24/+24 |
| 2024-07-26 | x86/APX: optimize certain {nf}-form insns to BMI2 ones | Jan Beulich | 1 | -13/+13 |
| 2024-07-04 | Support APX CFCMOV | Cui, Lili | 1 | -265/+1229 |
| 2024-06-28 | x86/APX: apply NDD-to-legacy transformation to further CMOVcc forms | Jan Beulich | 1 | -30/+30 |
| 2024-06-28 | x86/APX: extend TEST-by-imm7 optimization to CTESTcc | Jan Beulich | 1 | -29/+29 |
| 2024-06-28 | x86/APX: optimize {nf}-form IMUL-by-power-of-2 to SHL | Jan Beulich | 1 | -6/+6 |
| 2024-06-28 | x86/APX: optimize certain {nf}-form insns to LEA | Jan Beulich | 1 | -4/+4 |
| 2024-06-28 | x86/APX: optimize {nf}-form rotate-by-width-less-1 | Jan Beulich | 1 | -4/+4 |
| 2024-06-28 | x86/APX: optimize {nf} forms of ADD/SUB with specific immediates | Jan Beulich | 1 | -8/+8 |
| 2024-06-21 | x86: optimize {,V}PEXTR{D,Q} with immediate of 0 | Jan Beulich | 1 | -10/+10 |
| 2024-06-21 | x86: optimize left-shift-by-1 | Jan Beulich | 1 | -24/+24 |
| 2024-06-19 | x86: Remove the secondary encoding for ctest. | Cui, Lili | 1 | -569/+289 |
| 2024-06-18 | Support APX CCMP and CTEST | Cui, Lili | 1 | -290/+2081 |
| 2024-06-10 | x86/APX: convert ZU to operand constraint | Jan Beulich | 1 | -4216/+4216 |
| 2024-06-10 | x86/APX: support extended SETcc form | Jan Beulich | 1 | -311/+551 |
| 2024-06-10 | x86/APX: add missing CPU requirement to imm+rm forms of <alu2> insns | Jan Beulich | 1 | -14/+14 |
| 2024-05-29 | x86/Intel: warn about undue mnemonic suffixes | Jan Beulich | 1 | -5570/+5570 |
| 2024-05-24 | x86: correct VCVT{,U}SI2SD | Jan Beulich | 1 | -8/+8 |
| 2024-05-22 | Support APX zero-upper | Cui, Lili | 1 | -4339/+4898 |
| 2024-05-06 | x86: Drop using extension_opcode to encode vvvv register | Cui, Lili | 1 | -56/+56 |
| 2024-05-06 | x86: Drop SwapSources | Cui, Lili | 1 | -283/+283 |
| 2024-05-06 | x86: Use vexvvvv as the switch state to encode the vvvv register | Cui, Lili | 1 | -86/+86 |
| 2024-05-03 | x86/APX: further extend SSE2AVX coverage | Jan Beulich | 1 | -225/+255 |
| 2024-05-03 | x86/APX: extend SSE2AVX coverage | Jan Beulich | 1 | -452/+1684 |
