Age | Commit message (Expand) | Author | Files | Lines |
2024-04-17 | Add W table for USER_MSR under MAP4. | Hu, Lin1 | 1 | -0/+2 |
2024-04-09 | Support {evex} pseudo prefix for decode evex promoted insns without egpr32. | Hu, Lin1 | 1 | -40/+72 |
2024-04-07 | Support APX NF | Cui, Lili | 1 | -42/+68 |
2024-04-03 | x86/APX: Remove KEYLOCKER and SHA promotions from EVEX MAP4 | Cui, Lili | 1 | -12/+0 |
2024-03-15 | x86/APX: legacy promoted insns can't access %xmm16-%xmm31 | Jan Beulich | 1 | -0/+5 |
2024-02-09 | x86/APX: with REX2 map 1 doesn't "chain" to maps 2 or 3 | Jan Beulich | 1 | -7/+5 |
2024-01-26 | x86/APX: TILE{RELEASE,ZERO} have no EVEX encodings | Jan Beulich | 1 | -0/+9 |
2024-01-26 | x86/APX: no need to have decode go through x86_64_table[] | Jan Beulich | 1 | -16/+17 |
2024-01-19 | x86/APX: be consistent with insn suffixes | Jan Beulich | 1 | -5/+5 |
2024-01-19 | x86: support APX forms of U{RD,WR}MSR | Jan Beulich | 1 | -1/+13 |
2024-01-07 | i386: Correct adcx suffix in disassembler | H.J. Lu | 1 | -4/+13 |
2024-01-04 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2023-12-28 | Support APX JMPABS for disassembler | Hu, Lin1 | 1 | -2/+35 |
2023-12-28 | Support APX pushp/popp | Cui, Lili | 1 | -19/+36 |
2023-12-28 | Support APX Push2/Pop2 | Mo, Zewei | 1 | -0/+31 |
2023-12-28 | Support APX NDD | konglin1 | 1 | -64/+107 |
2023-12-28 | Support APX GPR32 with extend evex prefix | Cui, Lili | 1 | -23/+137 |
2023-12-28 | Created an empty EVEX_MAP4_ sub-table for EVEX instructions. | Cui, Lili | 1 | -0/+1 |
2023-12-28 | Support APX GPR32 with rex2 prefix | Cui, Lili | 1 | -90/+167 |
2023-12-15 | x86: Intel syntax implies Intel mnemonics | Jan Beulich | 1 | -5/+6 |
2023-12-13 | Make const_1_mode print $1 in AT&T syntax | Cui, Lili | 1 | -0/+2 |
2023-10-31 | Support Intel USER_MSR | Hu, Lin1 | 1 | -8/+88 |
2023-08-02 | Revert "2.41 Release sources" | Sam James | 1 | -1563/+1070 |
2023-08-02 | 2.41 Release sourcesbinutils-2_41-release | Nick Clifton | 1 | -1070/+1563 |
2023-07-27 | Support Intel PBNDKB | Hu, Lin1 | 1 | -0/+14 |
2023-07-27 | Support Intel SM4 | Haochen Jiang | 1 | -1/+2 |
2023-07-27 | Support Intel SM3 | Haochen Jiang | 1 | -2/+38 |
2023-07-27 | Support Intel SHA512 | Haochen Jiang | 1 | -3/+68 |
2023-07-27 | Support Intel AVX-VNNI-INT16 | konglin1 | 1 | -2/+28 |
2023-07-21 | x86: adjust disassembly of insns operating on selector values | Jan Beulich | 1 | -6/+6 |
2023-07-21 | x86: simplify disassembly of LAR/LSL | Jan Beulich | 1 | -14/+2 |
2023-07-11 | x86: simplify table-referencing macros | Jan Beulich | 1 | -17/+15 |
2023-07-11 | x86: convert 0FXOP to just XOP in enumerator names | Jan Beulich | 1 | -304/+304 |
2023-07-11 | x86: misc further register-only insns don't need to go through mod_table[] | Jan Beulich | 1 | -145/+73 |
2023-07-11 | x86: various operations on mask registers can avoid going through mod_table[] | Jan Beulich | 1 | -270/+170 |
2023-07-11 | x86: slightly rework handling of some register-only insns | Jan Beulich | 1 | -61/+52 |
2023-07-11 | x86: SIMD shift-by-immediate don't need to go through mod_table[] | Jan Beulich | 1 | -54/+18 |
2023-07-11 | x86: misc further memory-only insns don't need to go through mod_table[] | Jan Beulich | 1 | -257/+90 |
2023-07-11 | x86: {,V}MOVNT* don't need to go through mod_table[] | Jan Beulich | 1 | -61/+15 |
2023-07-11 | x86: fold legacy/VEX {,V}MOV{H,L}* entries | Jan Beulich | 1 | -66/+32 |
2023-07-11 | x86: fold certain legacy/VEX table entries | Jan Beulich | 1 | -293/+97 |
2023-07-04 | x86: flag bad EVEX masking for miscellaneous insns | Jan Beulich | 1 | -21/+28 |
2023-07-04 | x86: flag EVEX masking when destination is GPR(-like) | Jan Beulich | 1 | -1/+16 |
2023-07-04 | x86: flag EVEX.z set when destination is memory | Jan Beulich | 1 | -0/+7 |
2023-07-04 | x86: flag EVEX.z set when destination is a mask register | Jan Beulich | 1 | -0/+12 |
2023-07-04 | x86: re-work EVEX-z-without-masking check | Jan Beulich | 1 | -10/+8 |
2023-06-21 | x86: fix expansion of %XV | Jan Beulich | 1 | -7/+8 |
2023-05-26 | x86: fix disassembler build after 1a3b4f90bc5f | Jan Beulich | 1 | -1/+1 |
2023-05-26 | x86: convert two pointers to (indexing) integers | Jan Beulich | 1 | -16/+17 |
2023-05-26 | x86: disassembling over-long insns | Jan Beulich | 1 | -9/+10 |