aboutsummaryrefslogtreecommitdiff
path: root/opcodes/aarch64-tbl.h
AgeCommit message (Expand)AuthorFilesLines
2024-05-17aarch64: correct SVE2.1 ld2q (scalar plus scalar)Jan Beulich1-1/+1
2024-05-17aarch64: correct SVE2.1 ld{3,4}q / st{3,4}q (scalar plus immediate)Jan Beulich1-4/+4
2024-05-16aarch64: fp8 convert and scale - add sme2 insn variantsVictor Do Nascimento1-0/+16
2024-05-16aarch64: fp8 convert and scale - add sve2 insn variantsVictor Do Nascimento1-0/+20
2024-05-16aarch64: fp8 convert and scale - Add advsimd insn variantsVictor Do Nascimento1-0/+41
2024-05-16aarch64: fp8 convert and scale - add feature flags and related structuresVictor Do Nascimento1-0/+18
2024-04-03Arm64: check tied operand specifier in aarch64-genJan Beulich1-1/+1
2024-03-19gas, aarch64: Add faminmax extensionSaurabh Jha1-0/+30
2024-03-18aarch64: Add support for SVE ADDPT, SUBPT, MADPT, MLAPT instructionsYury Khrustalev1-0/+18
2024-03-18aarch64: Add support for (M)ADDPT and (M)SUBPT instructionsYury Khrustalev1-1/+19
2024-03-18Arm64: check matching operands for predicated B16B16 insnsJan Beulich1-7/+7
2024-03-18Arm64: correct B16B16 indexed bf{mla,mls,mul}Jan Beulich1-3/+3
2024-02-29aarch64: Fix the 2nd operand in gcsstr and gcssttr instructions.Srinath Parvathaneni1-2/+2
2024-02-27aarch64: rename internals related to PAuth feature to use pauth in their nami...Matthieu Longo1-38/+38
2024-01-26aarch64: move SHA512 instructions to +sha3Andrew Carlotti1-5/+5
2024-01-15aarch64: rcpc3: Add FP load/store insnsVictor Do Nascimento1-0/+4
2024-01-15aarch64: rcpc3: Add integer load/store insnsVictor Do Nascimento1-0/+5
2024-01-15aarch64: rcpc3: Define RCPC3_INSN macroVictor Do Nascimento1-0/+2
2024-01-15aarch64: rcpc3: New RCPC3_ADDR operand typesVictor Do Nascimento1-1/+15
2024-01-15aarch64: rcpc3: Add +rcpc3 architectural feature support flagVictor Do Nascimento1-0/+4
2024-01-15aarch64: Add SVE2.1 Contiguous load/store instructions.Srinath Parvathaneni1-1/+33
2024-01-15PATCH 5/6][Binutils] aarch64: Add SVE2.1 fmin and fmax instructions.Srinath Parvathaneni1-0/+12
2024-01-15aarch64: Add SVE2.1 dupq, eorqv and extq instructions.Srinath Parvathaneni1-0/+10
2024-01-15aarch64: Add support for FEAT_SVE2p1.Srinath Parvathaneni1-0/+29
2024-01-15aarch64: Add support for FEAT_SME2p1 instructions.Srinath Parvathaneni1-0/+36
2024-01-15aarch64: Add support for FEAT_B16B16 instructions.Srinath Parvathaneni1-0/+31
2024-01-12aarch64: Remove unused codeAndrew Carlotti1-34/+0
2024-01-12aarch64: Make FEAT_ASMv8p2 instruction aliases always availableAndrew Carlotti1-2/+2
2024-01-12aarch64: Add +xs flag for existing instructionsAndrew Carlotti1-1/+6
2024-01-12aarch64: Add +wfxt flag for existing instructionsAndrew Carlotti1-2/+7
2024-01-12aarch64: Add +rcpc2 flag for existing instructionsAndrew Carlotti1-13/+18
2024-01-12aarch64: Add +jscvt flag for existing fjcvtzs instructionAndrew Carlotti1-1/+6
2024-01-09aarch64: ADD FEAT_THE RCWCAS instructions.Srinath Parvathaneni1-0/+118
2024-01-09aarch64: Add support for 128-bit system register mrrs and msrr insnsVictor Do Nascimento1-0/+3
2024-01-09aarch64: Implement TLBIP 128-bit instructionVictor Do Nascimento1-0/+3
2024-01-09aarch64: Create QL_SRC_X2 and QL_DEST_X2 qualifier macrosVictor Do Nascimento1-0/+12
2024-01-09aarch64: Apply narrowing of allowed immediate values for SYSPVictor Do Nascimento1-1/+1
2024-01-09aarch64: Add support for the SYSP 128-bit system instructionVictor Do Nascimento1-1/+8
2024-01-09aarch64: Add support for xzr register in register pair operandsVictor Do Nascimento1-0/+2
2024-01-09aarch64: Expand maximum number of operands from 5 to 6Victor Do Nascimento1-0/+2
2024-01-09aarch64: Add +d128 architectural feature supportVictor Do Nascimento1-0/+5
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2023-12-19aarch64: Add FEAT_ITE supportAndrea Corallo1-1/+9
2023-12-19aarch64: Add FEAT_ECBHB supportAndrea Corallo1-0/+4
2023-12-19aarch64: Add FEAT_SPECRES2 supportAndrea Corallo1-0/+7
2023-11-09aarch64: Fix error in THE system register checkingVictor Do Nascimento1-3/+0
2023-11-07aarch64: Add LSE128 instructionsVictor Do Nascimento1-0/+13
2023-11-07aarch64: Add arch support for LSE128 extensionVictor Do Nascimento1-0/+5
2023-11-07aarch64: Add LSE128 instruction operand supportVictor Do Nascimento1-0/+2
2023-11-07aarch64: Add THE system register supportVictor Do Nascimento1-0/+3
generated by cgit v1.1 at 2024-10-18 11:45:22 +0000