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2019-08-09x86-64: generalize SIMD test expectationsJan Beulich7-927/+212
2019-08-08Change the output of readelf's note display so that the "Data size" column he...Nick Clifton5-4/+13
2019-08-08Update the handling of shift rotate and load/store multiple instructions in ...Yoshinori Sato1-4/+4
2019-08-08Move the h8300 assembler's MOVFPE and MOVTPE tests to the correct location.Yoshinori Sato5-50/+56
2019-08-05Removes support in the ARM assembler for the unsigned variants of the VQ(R)DM...Barnaby Wilks12-2712/+55
2019-07-30RISC-V: Fix minor issues with FP csr instructions.Jim Wilson5-1/+71
2019-07-24Update the Swedish translation for the gas sub-directory.Nick Clifton2-4191/+5083
2019-07-24[ARC] Update disassembler opcode selectionClaudiu Zissulescu2-1/+5
2019-07-24Complain about mbind, ifunc, and unique in final_writeAlan Modra4-2/+11
2019-07-24Define ELF_OSABI for visiumAlan Modra4-5/+16
2019-07-23[AArch64] Add support for GMID_EL1 register for +memtagKyrylo Tkachov4-0/+9
2019-07-23SHF_GNU_MBIND requires ELFOSABI_GNUAlan Modra6-29/+65
2019-07-23gas "mbind sections" testAlan Modra2-2/+4
2019-07-22This patch addresses the change in the June Armv8.1-M Mainline specification,...Barnaby Wilks10-137/+136
2019-07-19x86: Pass -O0 to assembler in noextreg.dH.J. Lu2-0/+5
2019-07-19cpu,opcodes,gas: use %r0 and %r6 instead of %a and %ctf in eBPF disassemblerJose E. Marchesi7-52/+60
2019-07-19gas: make .lcomm to accept an optional aligmnet in eBPF targetsJose E. Marchesi2-1/+49
2019-07-19[AArch64] Rename +bitperm to +sve2-bitpermRichard Sandiford8-7/+17
2019-07-19[PowerPC64] pc-relative TLS relocationsAlan Modra2-5/+47
2019-07-18gas: .lcomm gets an alignment argument in eBPFJose E. Marchesi2-1/+8
2019-07-17gas: support .half, .word and .dword directives in eBPFJose E. Marchesi7-0/+58
2019-07-17x86: replace "anymem" checks where possibleJan Beulich2-8/+22
2019-07-16x86: make RegMem an opcode modifierJan Beulich2-12/+25
2019-07-16x86: fold SReg{2,3}Jan Beulich6-328/+45
2019-07-15cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructionsJose E. Marchesi5-20/+29
2019-07-14cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructionsJose E. Marchesi4-24/+31
2019-07-09Re: gas/ELF: don't accumulate .type settingsAlan Modra5-29/+42
2019-07-05Kito's 5-part patch set to improve .insn support.Jim Wilson4-53/+98
2019-07-04x86: correct "-Q" option handlingJan Beulich2-1/+9
2019-07-04gas/ELF: don't accumulate .type settingsJan Beulich8-1/+118
2019-07-03Fix assembler tests to work with toolchains that have been configured with --...Nick Clifton93-64/+194
2019-07-02This patch fixes a bug in the AArch64 assembler where an incorrect structural...Barnaby Wilks6-1/+29
2019-07-02[AArch64] Allow MOVPRFX to be used with FMOVRichard Sandiford3-0/+30
2019-07-02[AArch64] Add missing C_MAX_ELEM flags for SVE conversionsRichard Sandiford4-7/+80
2019-07-02[AArch64] Fix bogus MOVPRFX warning for GPR form of CPYRichard Sandiford4-3/+9
2019-07-01Fix bug when generating REL type relocs for assembler generated build notes.Nick Clifton2-10/+21
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson7-11/+43
2019-07-01Document the .value directive supported by the x86 and x86_64 assemblers.Nick Clifton2-0/+12
2019-07-01Correct a typo in the description of the Align and P2align directives.Nick Clifton2-2/+9
2019-07-01Fix spelling error in assembler documentation.Nick Clifton2-1/+6
2019-07-01x86: drop Vec_Imm4Jan Beulich2-25/+19
2019-07-01x86: limit ImmExt abuseJan Beulich2-13/+17
2019-07-01x86: optimize AND/OR with twice the same registerJan Beulich10-1/+435
2019-07-01x86-64: optimize certain commutative VEX-encoded insnsJan Beulich14-1246/+1048
2019-07-01x86: StaticRounding implies SAEJan Beulich2-6/+8
2019-07-01x86: optimize EVEX packed integer logical instructionsJan Beulich24-17/+955
2019-07-01x86: add missing pseudo ops for VPCLMULQDQ ISA extensionJan Beulich19-18/+145
2019-07-01x86: use encoding_length() also elsewhereJan Beulich2-32/+8
2019-07-01x86: warn about insns exceeding the 15-byte limitJan Beulich7-0/+146
2019-06-27i386: Check vector length for scatter/gather prefetch instructionsH.J. Lu1-0/+9
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