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2023-11-28gas: add NEWS entry for change of comment syntax in BPF assemblerJose E. Marchesi2-0/+9
2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> * NEWS: Add entry about change of comment syntax in the BPF assembler.
2023-11-28gas: change meaning of ; in the BPF assemblerJose E. Marchesi12-35/+57
The BPF assembler in clang uses semi-colon (;) to separate statements, not to be begin line comments. This patch adapts the GNU assembler accordingly. Testsuite and documentation updated accordingly. 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c: Semicolon does not start a comment, but separates multiple commands on a single line. * testsuite/gas/bpf/alu-pseudoc.s: Adapt test accordingly. * testsuite/gas/bpf/spacing-pseudoc.s: Likewise. * testsuite/gas/bpf/offset16-overflow.s: Likewise. * testsuite/gas/bpf/jump-relax-jump.s: Likewise. * testsuite/gas/bpf/jump-relax-ja.s: Likewise. * testsuite/gas/bpf/imm32-overflow.s: Likewise. * testsuite/gas/bpf/disp32-overflow.s: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.s: Likewise. * testsuite/gas/bpf/disp16-overflow.s: Likewise. * doc/c-bpf.texi (BPF Special Characters): Update.
2023-11-28testsuite: Clean up .allow_index_reg in i386 testsHaochen Jiang234-574/+350
gas/ChangeLog: * testsuite/gas/i386/adx.s: Remove .allow_index_reg. * testsuite/gas/i386/amx-complex-inval.l: Ditto. * testsuite/gas/i386/amx-complex-inval.s: Ditto. * testsuite/gas/i386/avx-ifma.s: Ditto. * testsuite/gas/i386/avx-ne-convert.s: Ditto. * testsuite/gas/i386/avx-scalar-2.s: Ditto. * testsuite/gas/i386/avx-vnni-int8.s: Ditto. * testsuite/gas/i386/avx-vnni.s: Ditto. * testsuite/gas/i386/avx-wig.s: Ditto. * testsuite/gas/i386/avx2-wig.s: Ditto. * testsuite/gas/i386/avx2.s: Ditto. * testsuite/gas/i386/avx256int.s: Ditto. * testsuite/gas/i386/avx512_4fmaps.s: Ditto. * testsuite/gas/i386/avx512_4vnniw.s: Ditto. * testsuite/gas/i386/avx512_bf16.s: Ditto. * testsuite/gas/i386/avx512_bf16_vl-inval.l: Ditto. * testsuite/gas/i386/avx512_bf16_vl-inval.s: Ditto. * testsuite/gas/i386/avx512_bf16_vl.s: Ditto. * testsuite/gas/i386/avx512_fp16-inval-bcast.l: Ditto. * testsuite/gas/i386/avx512_fp16-inval-bcast.s: Ditto. * testsuite/gas/i386/avx512_fp16.s: Ditto. * testsuite/gas/i386/avx512_fp16_pseudo_ops.s: Ditto. * testsuite/gas/i386/avx512_fp16_vl.s: Ditto. * testsuite/gas/i386/avx512_vpopcntdq.s: Ditto. * testsuite/gas/i386/avx512bitalg.s: Ditto. * testsuite/gas/i386/avx512bitalg_vl.s: Ditto. * testsuite/gas/i386/avx512bw-opts.s: Ditto. * testsuite/gas/i386/avx512bw-wig.s: Ditto. * testsuite/gas/i386/avx512bw.s: Ditto. * testsuite/gas/i386/avx512bw_vl-opts.s: Ditto. * testsuite/gas/i386/avx512bw_vl-wig.s: Ditto. * testsuite/gas/i386/avx512bw_vl.s: Ditto. * testsuite/gas/i386/avx512cd.s: Ditto. * testsuite/gas/i386/avx512cd_vl.s: Ditto. * testsuite/gas/i386/avx512dq-rcig.s: Ditto. * testsuite/gas/i386/avx512dq.s: Ditto. * testsuite/gas/i386/avx512dq_vl.s: Ditto. * testsuite/gas/i386/avx512er-rcig.s: Ditto. * testsuite/gas/i386/avx512er.s: Ditto. * testsuite/gas/i386/avx512f-opts.s: Ditto. * testsuite/gas/i386/avx512f-rcig.s: Ditto. * testsuite/gas/i386/avx512f.s: Ditto. * testsuite/gas/i386/avx512f_gfni.s: Ditto. * testsuite/gas/i386/avx512f_vaes.s: Ditto. * testsuite/gas/i386/avx512f_vl-opts.s: Ditto. * testsuite/gas/i386/avx512f_vl-wig.s: Ditto. * testsuite/gas/i386/avx512f_vl.s: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq.s: Ditto. * testsuite/gas/i386/avx512ifma.s: Ditto. * testsuite/gas/i386/avx512ifma_vl.s: Ditto. * testsuite/gas/i386/avx512pf.s: Ditto. * testsuite/gas/i386/avx512vbmi.s: Ditto. * testsuite/gas/i386/avx512vbmi2.s: Ditto. * testsuite/gas/i386/avx512vbmi2_vl.s: Ditto. * testsuite/gas/i386/avx512vbmi_vl.s: Ditto. * testsuite/gas/i386/avx512vl_gfni.s: Ditto. * testsuite/gas/i386/avx512vl_vaes.s: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq.s: Ditto. * testsuite/gas/i386/avx512vnni.s: Ditto. * testsuite/gas/i386/avx512vnni_vl.s: Ditto. * testsuite/gas/i386/bmi.s: Ditto. * testsuite/gas/i386/bmi2.s: Ditto. * testsuite/gas/i386/cldemote.s: Ditto. * testsuite/gas/i386/clflushopt.s: Ditto. * testsuite/gas/i386/clwb.s: Ditto. * testsuite/gas/i386/cmpccxadd-inval.l: Ditto. * testsuite/gas/i386/cmpccxadd-inval.s: Ditto. * testsuite/gas/i386/enqcmd-inval.l: Ditto. * testsuite/gas/i386/enqcmd-inval.s: Ditto. * testsuite/gas/i386/enqcmd.s: Ditto. * testsuite/gas/i386/evex-lig-2.s: Ditto. * testsuite/gas/i386/evex-lig.s: Ditto. * testsuite/gas/i386/evex-wig.s: Ditto. * testsuite/gas/i386/evex.s: Ditto. * testsuite/gas/i386/fma-scalar.s: Ditto. * testsuite/gas/i386/fma.s: Ditto. * testsuite/gas/i386/fma4.s: Ditto. * testsuite/gas/i386/gfni.s: Ditto. * testsuite/gas/i386/hle.s: Ditto. * testsuite/gas/i386/ilp32/enqcmd.s: Ditto. * testsuite/gas/i386/ilp32/movdir.s: Ditto. * testsuite/gas/i386/lwp.s: Ditto. * testsuite/gas/i386/movdir.s: Ditto. * testsuite/gas/i386/movdir64b-reg.l: Ditto. * testsuite/gas/i386/movdir64b-reg.s: Ditto. * testsuite/gas/i386/mpx-inval-1.l: Ditto. * testsuite/gas/i386/mpx-inval-1.s: Ditto. * testsuite/gas/i386/mpx.s: Ditto. * testsuite/gas/i386/msrlist-inval.l: Ditto. * testsuite/gas/i386/msrlist-inval.s: Ditto. * testsuite/gas/i386/notrack.s: Ditto. * testsuite/gas/i386/notrackbad.l: Ditto. * testsuite/gas/i386/notrackbad.s: Ditto. * testsuite/gas/i386/optimize-1.s: Ditto. * testsuite/gas/i386/optimize-2.s: Ditto. * testsuite/gas/i386/optimize-3.s: Ditto. * testsuite/gas/i386/optimize-6.s: Ditto. * testsuite/gas/i386/optimize-6a.l: Ditto. * testsuite/gas/i386/optimize-7.l: Ditto. * testsuite/gas/i386/optimize-7.s: Ditto. * testsuite/gas/i386/opts.s: Ditto. * testsuite/gas/i386/prefetchwt1.s: Ditto. * testsuite/gas/i386/raoint.s: Ditto. * testsuite/gas/i386/sha.s: Ditto. * testsuite/gas/i386/sse2avx.s: Ditto. * testsuite/gas/i386/tbm.s: Ditto. * testsuite/gas/i386/vaes.s: Ditto. * testsuite/gas/i386/vex-lig-2.s: Ditto. * testsuite/gas/i386/vp2intersect-inval-bcast.l: Ditto. * testsuite/gas/i386/vp2intersect-inval-bcast.s: Ditto. * testsuite/gas/i386/vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-adx.s: Ditto. * testsuite/gas/i386/x86-64-amx-complex.s: Ditto. * testsuite/gas/i386/x86-64-amx-fp16.s: Ditto. * testsuite/gas/i386/x86-64-avx-ifma.s: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert.s: Ditto. * testsuite/gas/i386/x86-64-avx-scalar-2.s: Ditto. * testsuite/gas/i386/x86-64-avx-swap.s: Ditto. * testsuite/gas/i386/x86-64-avx-vnni-int8.s: Ditto. * testsuite/gas/i386/x86-64-avx-vnni.s: Ditto. * testsuite/gas/i386/x86-64-avx-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx2-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx2.s: Ditto. * testsuite/gas/i386/x86-64-avx256int.s: Ditto. * testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto. * testsuite/gas/i386/x86-64-avx512_4vnniw.s: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16.s: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.l: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.s: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.l: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-register.l: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-register.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg.s: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512cd.s: Ditto. * testsuite/gas/i386/x86-64-avx512cd_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512dq-rcig.s: Ditto. * testsuite/gas/i386/x86-64-avx512dq.s: Ditto. * testsuite/gas/i386/x86-64-avx512dq_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512er-rcig.s: Ditto. * testsuite/gas/i386/x86-64-avx512er.s: Ditto. * testsuite/gas/i386/x86-64-avx512f-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512f-rcig.s: Ditto. * testsuite/gas/i386/x86-64-avx512f.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_gfni.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512ifma.s: Ditto. * testsuite/gas/i386/x86-64-avx512ifma_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512pf.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_gfni.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512vnni.s: Ditto. * testsuite/gas/i386/x86-64-avx512vnni_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx_gfni.s: Ditto. * testsuite/gas/i386/x86-64-bmi.s: Ditto. * testsuite/gas/i386/x86-64-bmi2.s: Ditto. * testsuite/gas/i386/x86-64-cldemote.s: Ditto. * testsuite/gas/i386/x86-64-clflushopt.s: Ditto. * testsuite/gas/i386/x86-64-clwb.s: Ditto. * testsuite/gas/i386/x86-64-cmpccxadd.s: Ditto. * testsuite/gas/i386/x86-64-enqcmd-inval.l: Ditto. * testsuite/gas/i386/x86-64-enqcmd-inval.s: Ditto. * testsuite/gas/i386/x86-64-enqcmd.s: Ditto. * testsuite/gas/i386/x86-64-evex-lig-2.s: Ditto. * testsuite/gas/i386/x86-64-evex-lig.s: Ditto. * testsuite/gas/i386/x86-64-evex-wig.s: Ditto. * testsuite/gas/i386/x86-64-evex-wig2.s: Ditto. * testsuite/gas/i386/x86-64-fma-scalar.s: Ditto. * testsuite/gas/i386/x86-64-fma.s: Ditto. * testsuite/gas/i386/x86-64-fma4.s: Ditto. * testsuite/gas/i386/x86-64-fred.s: Ditto. * testsuite/gas/i386/x86-64-gfni.s: Ditto. * testsuite/gas/i386/x86-64-hle.s: Ditto. * testsuite/gas/i386/x86-64-lkgs.s: Ditto. * testsuite/gas/i386/x86-64-lwp.s: Ditto. * testsuite/gas/i386/x86-64-movdir.s: Ditto. * testsuite/gas/i386/x86-64-movdir64b-reg.l: Ditto. * testsuite/gas/i386/x86-64-movdir64b-reg.s: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-1.l: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-1.s: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-2.l: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-2.s: Ditto. * testsuite/gas/i386/x86-64-mpx.s: Ditto. * testsuite/gas/i386/x86-64-notrack.s: Ditto. * testsuite/gas/i386/x86-64-notrackbad.l: Ditto. * testsuite/gas/i386/x86-64-notrackbad.s: Ditto. * testsuite/gas/i386/x86-64-optimize-1.s: Ditto. * testsuite/gas/i386/x86-64-optimize-2.s: Ditto. * testsuite/gas/i386/x86-64-optimize-3.s: Ditto. * testsuite/gas/i386/x86-64-optimize-4.s: Ditto. * testsuite/gas/i386/x86-64-optimize-7.s: Ditto. * testsuite/gas/i386/x86-64-optimize-7a.l: Ditto. * testsuite/gas/i386/x86-64-optimize-8.l: Ditto. * testsuite/gas/i386/x86-64-optimize-8.s: Ditto. * testsuite/gas/i386/x86-64-opts.s: Ditto. * testsuite/gas/i386/x86-64-prefetchi-warn.s: Ditto. * testsuite/gas/i386/x86-64-prefetchi.s: Ditto. * testsuite/gas/i386/x86-64-prefetchwt1.s: Ditto. * testsuite/gas/i386/x86-64-raoint.s: Ditto. * testsuite/gas/i386/x86-64-sha.s: Ditto. * testsuite/gas/i386/x86-64-sse2avx.s: Ditto. * testsuite/gas/i386/x86-64-tbm.s: Ditto. * testsuite/gas/i386/x86-64-vaes.s: Ditto. * testsuite/gas/i386/x86-64-vex-lig-2.s: Ditto. * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.l: Ditto. * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-xop.s: Ditto. * testsuite/gas/i386/x86-64-xsavec.s: Ditto. * testsuite/gas/i386/x86-64-xsaves.s: Ditto. * testsuite/gas/i386/xop.s: Ditto. * testsuite/gas/i386/xsavec.s: Ditto. * testsuite/gas/i386/xsaves.s: Ditto.
2023-11-28testsuite: Clean up #as in dump file for i386 testsHaochen Jiang262-262/+0
gas/ChangeLog: * testsuite/gas/i386/avx-gather-intel.d: Remove unused #as. * testsuite/gas/i386/avx-gather.d: Ditto. * testsuite/gas/i386/avx-ifma-intel.d: Ditto. * testsuite/gas/i386/avx-ifma.d: Ditto. * testsuite/gas/i386/avx-ne-convert-intel.d: Ditto. * testsuite/gas/i386/avx-ne-convert.d: Ditto. * testsuite/gas/i386/avx-vnni-int8-intel.d: Ditto. * testsuite/gas/i386/avx-vnni-int8.d: Ditto. * testsuite/gas/i386/avx512_bf16.d: Ditto. * testsuite/gas/i386/avx512_bf16_vl.d: Ditto. * testsuite/gas/i386/avx512_fp16-intel.d: Ditto. * testsuite/gas/i386/avx512_fp16.d: Ditto. * testsuite/gas/i386/avx512_fp16_pseudo_ops.d: Ditto. * testsuite/gas/i386/avx512_fp16_vl-intel.d: Ditto. * testsuite/gas/i386/avx512_fp16_vl.d: Ditto. * testsuite/gas/i386/avx512_vpopcntdq-intel.d: Ditto. * testsuite/gas/i386/avx512_vpopcntdq.d: Ditto. * testsuite/gas/i386/avx512bitalg-intel.d: Ditto. * testsuite/gas/i386/avx512bitalg.d: Ditto. * testsuite/gas/i386/avx512bitalg_vl-intel.d: Ditto. * testsuite/gas/i386/avx512bitalg_vl.d: Ditto. * testsuite/gas/i386/avx512bw-opts-intel.d: Ditto. * testsuite/gas/i386/avx512bw-opts.d: Ditto. * testsuite/gas/i386/avx512bw_vl-intel.d: Ditto. * testsuite/gas/i386/avx512bw_vl-opts-intel.d: Ditto. * testsuite/gas/i386/avx512bw_vl-opts.d: Ditto. * testsuite/gas/i386/avx512bw_vl.d: Ditto. * testsuite/gas/i386/avx512cd-intel.d: Ditto. * testsuite/gas/i386/avx512cd.d: Ditto. * testsuite/gas/i386/avx512cd_vl-intel.d: Ditto. * testsuite/gas/i386/avx512cd_vl.d: Ditto. * testsuite/gas/i386/avx512dq-intel.d: Ditto. * testsuite/gas/i386/avx512dq.d: Ditto. * testsuite/gas/i386/avx512dq_vl-intel.d: Ditto. * testsuite/gas/i386/avx512dq_vl.d: Ditto. * testsuite/gas/i386/avx512er-intel.d: Ditto. * testsuite/gas/i386/avx512er.d: Ditto. * testsuite/gas/i386/avx512f-nondef.d: Ditto. * testsuite/gas/i386/avx512f-opts-intel.d: Ditto. * testsuite/gas/i386/avx512f-opts.d: Ditto. * testsuite/gas/i386/avx512f_gfni-intel.d: Ditto. * testsuite/gas/i386/avx512f_gfni.d: Ditto. * testsuite/gas/i386/avx512f_vaes-intel.d: Ditto. * testsuite/gas/i386/avx512f_vaes.d: Ditto. * testsuite/gas/i386/avx512f_vl-intel.d: Ditto. * testsuite/gas/i386/avx512f_vl-opts-intel.d: Ditto. * testsuite/gas/i386/avx512f_vl-opts.d: Ditto. * testsuite/gas/i386/avx512f_vl.d: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq.d: Ditto. * testsuite/gas/i386/avx512ifma-intel.d: Ditto. * testsuite/gas/i386/avx512ifma.d: Ditto. * testsuite/gas/i386/avx512ifma_vl-intel.d: Ditto. * testsuite/gas/i386/avx512ifma_vl.d: Ditto. * testsuite/gas/i386/avx512pf-intel.d: Ditto. * testsuite/gas/i386/avx512pf.d: Ditto. * testsuite/gas/i386/avx512vbmi-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi.d: Ditto. * testsuite/gas/i386/avx512vbmi2-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi2.d: Ditto. * testsuite/gas/i386/avx512vbmi2_vl-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi2_vl.d: Ditto. * testsuite/gas/i386/avx512vbmi_vl-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi_vl.d: Ditto. * testsuite/gas/i386/avx512vl_gfni-intel.d: Ditto. * testsuite/gas/i386/avx512vl_gfni.d: Ditto. * testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vaes.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq.d: Ditto. * testsuite/gas/i386/avx512vnni-intel.d: Ditto. * testsuite/gas/i386/avx512vnni.d: Ditto. * testsuite/gas/i386/avx512vnni_vl-intel.d: Ditto. * testsuite/gas/i386/avx512vnni_vl.d: Ditto. * testsuite/gas/i386/bmi-intel.d: Ditto. * testsuite/gas/i386/bmi.d: Ditto. * testsuite/gas/i386/bmi2-intel.d: Ditto. * testsuite/gas/i386/bmi2.d: Ditto. * testsuite/gas/i386/cldemote-intel.d: Ditto. * testsuite/gas/i386/cldemote.d: Ditto. * testsuite/gas/i386/clflushopt-intel.d: Ditto. * testsuite/gas/i386/clflushopt.d: Ditto. * testsuite/gas/i386/clwb-intel.d: Ditto. * testsuite/gas/i386/clwb.d: Ditto. * testsuite/gas/i386/enqcmd-intel.d: Ditto. * testsuite/gas/i386/enqcmd.d: Ditto. * testsuite/gas/i386/gfni-intel.d: Ditto. * testsuite/gas/i386/gfni.d: Ditto. * testsuite/gas/i386/hreset.d: Ditto. * testsuite/gas/i386/invpcid-intel.d: Ditto. * testsuite/gas/i386/invpcid.d: Ditto. * testsuite/gas/i386/keylocker-intel.d: Ditto. * testsuite/gas/i386/keylocker.d: Ditto. * testsuite/gas/i386/movdir-intel.d: Ditto. * testsuite/gas/i386/movdir.d: Ditto. * testsuite/gas/i386/pr27198.d: Ditto. * testsuite/gas/i386/pr30248.d: Ditto. * testsuite/gas/i386/prefetchwt1-intel.d: Ditto. * testsuite/gas/i386/prefetchwt1.d: Ditto. * testsuite/gas/i386/ptwrite-intel.d: Ditto. * testsuite/gas/i386/ptwrite.d: Ditto. * testsuite/gas/i386/raoint-intel.d: Ditto. * testsuite/gas/i386/raoint.d: Ditto. * testsuite/gas/i386/serialize.d: Ditto. * testsuite/gas/i386/tbm-intel.d: Ditto. * testsuite/gas/i386/tdx.d: Ditto. * testsuite/gas/i386/tsxldtrk.d: Ditto. * testsuite/gas/i386/vp2intersect-intel.d: Ditto. * testsuite/gas/i386/vp2intersect.d: Ditto. * testsuite/gas/i386/vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/vpclmulqdq.d: Ditto. * testsuite/gas/i386/waitpkg-intel.d: Ditto. * testsuite/gas/i386/waitpkg.d: Ditto. * testsuite/gas/i386/wrmsrns-intel.d: Ditto. * testsuite/gas/i386/wrmsrns.d: Ditto. * testsuite/gas/i386/x86-64-amx-bad.d: Ditto. * testsuite/gas/i386/x86-64-amx-complex-bad.d: Ditto. * testsuite/gas/i386/x86-64-amx-complex-intel.d: Ditto. * testsuite/gas/i386/x86-64-amx-complex.d: Ditto. * testsuite/gas/i386/x86-64-amx-fp16-bad.d: Ditto. * testsuite/gas/i386/x86-64-amx-fp16-intel.d: Ditto. * testsuite/gas/i386/x86-64-amx-fp16.d: Ditto. * testsuite/gas/i386/x86-64-amx-intel.d: Ditto. * testsuite/gas/i386/x86-64-amx.d: Ditto. * testsuite/gas/i386/x86-64-avx-gather-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-gather.d: Ditto. * testsuite/gas/i386/x86-64-avx-ifma-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-ifma.d: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert.d: Ditto. * testsuite/gas/i386/x86-64-avx-vnni-int8-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-vnni-int8.d: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16.d: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-bad.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512er-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512er.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-nondef.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512f.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_gfni.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512pf-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512pf.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_gfni.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx_gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx_gfni.d: Ditto. * testsuite/gas/i386/x86-64-bmi-intel.d: Ditto. * testsuite/gas/i386/x86-64-bmi.d: Ditto. * testsuite/gas/i386/x86-64-bmi2-intel.d: Ditto. * testsuite/gas/i386/x86-64-bmi2.d: Ditto. * testsuite/gas/i386/x86-64-cldemote-intel.d: Ditto. * testsuite/gas/i386/x86-64-cldemote.d: Ditto. * testsuite/gas/i386/x86-64-clflushopt-intel.d: Ditto. * testsuite/gas/i386/x86-64-clflushopt.d: Ditto. * testsuite/gas/i386/x86-64-clwb-intel.d: Ditto. * testsuite/gas/i386/x86-64-clwb.d: Ditto. * testsuite/gas/i386/x86-64-cmpccxadd-intel.d: Ditto. * testsuite/gas/i386/x86-64-cmpccxadd.d: Ditto. * testsuite/gas/i386/x86-64-fred-intel.d: Ditto. * testsuite/gas/i386/x86-64-fred.d: Ditto. * testsuite/gas/i386/x86-64-gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-gfni.d: Ditto. * testsuite/gas/i386/x86-64-hreset.d: Ditto. * testsuite/gas/i386/x86-64-invpcid-intel.d: Ditto. * testsuite/gas/i386/x86-64-invpcid.d: Ditto. * testsuite/gas/i386/x86-64-keylocker-intel.d: Ditto. * testsuite/gas/i386/x86-64-keylocker.d: Ditto. * testsuite/gas/i386/x86-64-lkgs-intel.d: Ditto. * testsuite/gas/i386/x86-64-lkgs.d: Ditto. * testsuite/gas/i386/x86-64-movsxd-intel.d: Ditto. * testsuite/gas/i386/x86-64-movsxd.d: Ditto. * testsuite/gas/i386/x86-64-msrlist-intel.d: Ditto. * testsuite/gas/i386/x86-64-msrlist.d: Ditto. * testsuite/gas/i386/x86-64-prefetchi-intel.d: Ditto. * testsuite/gas/i386/x86-64-prefetchi.d: Ditto. * testsuite/gas/i386/x86-64-prefetchwt1-intel.d: Ditto. * testsuite/gas/i386/x86-64-prefetchwt1.d: Ditto. * testsuite/gas/i386/x86-64-ptwrite-intel.d: Ditto. * testsuite/gas/i386/x86-64-ptwrite.d: Ditto. * testsuite/gas/i386/x86-64-raoint-intel.d: Ditto. * testsuite/gas/i386/x86-64-raoint.d: Ditto. * testsuite/gas/i386/x86-64-serialize.d: Ditto. * testsuite/gas/i386/x86-64-sysenter.d: Ditto. * testsuite/gas/i386/x86-64-tbm-intel.d: Ditto. * testsuite/gas/i386/x86-64-tdx.d: Ditto. * testsuite/gas/i386/x86-64-tsxldtrk.d: Ditto. * testsuite/gas/i386/x86-64-uintr.d: Ditto. * testsuite/gas/i386/x86-64-vp2intersect-intel.d: Ditto. * testsuite/gas/i386/x86-64-vp2intersect.d: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-waitpkg-intel.d: Ditto. * testsuite/gas/i386/x86-64-waitpkg.d: Ditto. * testsuite/gas/i386/x86-64-wrmsrns-intel.d: Ditto. * testsuite/gas/i386/x86-64-wrmsrns.d: Ditto. * testsuite/gas/i386/x86-64-xsavec-intel.d: Ditto. * testsuite/gas/i386/x86-64-xsavec.d: Ditto. * testsuite/gas/i386/x86-64-xsaves-intel.d: Ditto. * testsuite/gas/i386/x86-64-xsaves.d: Ditto. * testsuite/gas/i386/xsavec-intel.d: Ditto. * testsuite/gas/i386/xsavec.d: Ditto. * testsuite/gas/i386/xsaves-intel.d: Ditto. * testsuite/gas/i386/xsaves.d: Ditto.
2023-11-27as: Add new estimated reciprocal instructions in LoongArch v1.1Jiajie Chen4-0/+24
New estimated reciprocal instructions in LoongArch v1.1: - frecipe.s/d - frsqrte.s/d - vfrecipe.s/d - vfrsqrte.s/d - xvfrecipe.s/d - xvfrsqrte.s/d Signed-off-by: Jiajie Chen <c@jia.je>
2023-11-27as: Add new atomic instructions in LoongArch v1.1Jiajie Chen3-2/+88
LoongArch V1.1 release is out at https://github.com/loongson/LoongArch-Documentation. New atomic instructions in LoongArch v1.1: - sc.q - llacq.w/d - screl.w/d - amcas{_db}.b/h/w/d - amswap{_db}.b/h - amadd{_db}.b/h Signed-off-by: Jiajie Chen <c@jia.je>
2023-11-24x86: shrink opcode sets tableJan Beulich2-130/+130
Have i386-gen produce merely the offsets into i386_optab[]. Besides allowing to shrink the table even on 32-bit builds, this results in removing a level of indirection from the frequently accessed current_templates, in return for adding a level of indirection when looking up mnemonics (commonly happening just once per insn). Plus for PIE builds of gas it also reduces the number of relocations by about two thousand. Finally a somewhat ugly static variable can also be eliminated from i386_displacement().
2023-11-24x86: also prefer VEX encoding over EVEX one for VCVTNEPS2BF16 when possibleJan Beulich3-13/+62
Deal with what 58bceb182740 ("x86: prefer VEX encodings over EVEX ones when possible") left out, for being slightly less straightforward.
2023-11-24RISC-V: reduce redundancy in sign/zero extension macro insn handlingJan Beulich1-16/+5
Fold M_{S,Z}EXTH, deriving signed-ness from the incoming mnemonic. Fold riscv_ext()'s calls md_assemblef(), the first of which were entirely identical, while the other pair differed in just a single character. Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-11-24RISC-V: disallow x0 with certain macro-insnsJan Beulich2-3/+6
While for some of the macro insns using x0 is kind of okay, as they would merely resolve to a sequence of hint insns (and hence not cause misbehavior at runtime), several of them have the degenerate AUIPC followed by a load, store, or branch using other than the designated symbol as address and hence causing runtime issues. Refuse to assemble those, leveraging that the matching function so far wasn't really used for macro insns: NULL is now allowed, indicating a match (which imo is preferable over converting match_never() to match_always()), while other matching functions now (also) used for macro insns need to avoid calling match_opcode(). Note that for LA the restriction is slightly too strict: In non-PIC mode using x0 would be okay-ish as per above (as it's just LLA there). Yet libopcodes doesn't know what mode gas is presently assembling for, so we want to err on the safe side. Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-11-23s390: Add missing extended mnemonicsJens Remus13-7/+68
Add extended mnemonics specified in the z/Architecture Principles of Operation [1] and z/Architecture Reference Summary [2], that were previously missing from the opcode table. The following added extended mnemonics are synonyms to a base mnemonic and therefore disassemble into their base mnemonic: jc, jcth, lfi, llgfi, llghi The following added extended mnemonics are more specific than their base mnemonic and therefore disassemble into the added extended mnemonic: risbhgz, risblgz, rnsbgt, rosbgt, rxsbgt The following added extended mnemonics are more specific than their base mnemonic, but disassemble into their base mnemonic due to design constraints: notr, notgr The missing extended mnemonic jl* conditional jump long flavors cannot be added, as they would clash with the existing non-standard extended mnemonic j* conditional jump flavors jle and jlh. The missing extended mnemonic jlc jump long conditional is not added, as the related jl* flavors cannot be added. Note that these missing jl* conditional jump long flavors are already defined as non-standard jg* flavors instead. While the related missing extended mnemonic jlc could be added as non-standard jgc instead it is forgone in favor of not adding further non-standard mnemonics. The missing extended mnemonics sllhh, sllhl, slllh, srlhh, srlhl, and srllh cannot be implemented using the current design, as they require computed operands. For that reason the following missing extended mnemonics are not added as well, as they fall into the same category of instructions that operate on high and low words of registers. They should better be added together, not to confuse the user, which of those instructions are currently implemented or not. lhhr, lhlr, llhfr, llchhr, llchlr, llclhr, llhhhr, llhhlr, llhlhr, nhhr, nhlr, nlhr, ohhr, ohlr, olhr, xhhr, xhlr, xlhr [1] IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16, https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf [2] IBM z/Architecture Reference Summary, SA22-7871-11, https://www.ibm.com/support/pages/sites/default/files/2022-09/SA22-7871-11.pdf opcodes/ * s390-opc.c: Define operand formats R_CP16_28, U6_18, and U5_27. Define instruction formats RIE_RRUUU3, RIE_RRUUU4, and RRF_R0RR4. * s390-opc.txt: Add extended mnemonics jc, jcth, lfi, llgfi, llghi, notgr, notr, risbhgz, risblgz, rnsbgt, rosbgt, and rxsbgt. gas/ * config/tc-s390.c: Add support to insert operand for format R_CP16_28, reusing existing logic for format V_CP16_12. * testsuite/gas/s390/esa-g5.s: Add test for extended mnemonic jc. * testsuite/gas/s390/esa-g5.d: Likewise. * testsuite/gas/s390/zarch-z900.s: Add test for extended mnemonic llghi. * testsuite/gas/s390/zarch-z900.d: Likewise. * testsuite/gas/s390/zarch-z9-109.s: Add tests for extended mnemonics lfi and llgfi. * testsuite/gas/s390/zarch-z9-109.d: Likewise. * testsuite/gas/s390/zarch-z10.s: Add tests for extended mnemonics rnsbgt, rosbgt, and rxsbgt. * testsuite/gas/s390/zarch-z10.d: Likewise. * testsuite/gas/s390/zarch-z196.s: Add tests for extended mnemonics jcth, risbhgz, and risblgz. * testsuite/gas/s390/zarch-z196.d: Likewise. * testsuite/gas/s390/zarch-arch13.s: Add tests for extended mnemonics notr and notgr. * testsuite/gas/s390/zarch-arch13.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-11-23s390: Align optional operand definition to specsJens Remus6-10/+27
The IBM z/Architecture Principle of Operation [1] specifies the last operand(s) of some (extended) mnemonics to be optional. Align the mnemonic definitions in the opcode table according to specification. This changes the last operand of the following (extended) mnemonics to be optional: risbg, risbgz, risbgn, risbgnz, risbhg, risblg, rnsbg, rosbg, rxsbg Note that efpc and sfpc actually have only one operand, but had erroneously been defined to have two. For backwards compatibility the wrong RR register format must be retained. Since the superfluous second operand is defined as optional the instruction can still be coded as specified. [1]: IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16, https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf opcodes/ * s390-opc.txt: Align optional operand definition to specification. testsuite/ * zarch-z10.s: Add test cases for risbg, risbgz, rnsbg, rosbg, and rxsbg. * zarch-z10.d: Likewise. * zarch-z196.s: Add test cases for risbhg and risblg. * zarch-z196.d: Likewise. * zarch-zEC12.s: Add test cases for risbgn and risbgnz. * zarch-zEC12.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-11-23s390: Add brasl edge test cases from ESA to z/ArchitectureJens Remus2-0/+12
The ESA opcode test cases for IBM z900 contain a few edge cases. They exercise the brasl mnemonic with its largest allowed negative and positive offsets. Linux on zSeries in ESA mode executes in 31-bit addressing mode. Therefore the ESA test cases are assembled with -m31. In 31-bit addressing mode the address computation using those large offsets wraps, which is correctly reflected in the disassembly. Linux on Z in z/Architecture mode executes in 64-bit addressing mode. Therefore the z/Architecture (zarch) test cases are assembled with -m64. In 64-bit addressing mode the address computation using those large offsets does not necessarily wrap. gas/ * testsuite/gas/s390/zarch-z900.s: Add brasl tests from ESA that exercise edge cases. * testsuite/gas/s390/zarch-z900.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-11-23s390: Position independent verification of relative addressingJens Remus6-237/+237
Opcode test cases for z/Architecture instructions that use relative addressing contained hardcoded offsets in the test verification patterns. Inserting or reordering of instructions into those test cases therefore required updating of those hardcoded offsets. Use regular expressions with backreferences to verify results of test cases containing instructions with relative addressing. This makes the verification position independent. gas/ * testsuite/gas/s390/esa-g5.d: Make opcode test verification pattern position independent where possible. * testsuite/gas/s390/esa-z900.d: Likewise. * testsuite/gas/s390/zarch-z900.d: Likewise. * testsuite/gas/s390/zarch-z10.d: Likewise. * testsuite/gas/s390/zarch-z196.d: Likewise. * testsuite/gas/s390/zarch-zEC12.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-11-23MIPS/GAS: Use addiu instead of addi in test elf-rel.YunQiang Su4-30/+36
2023-11-23MIPS/GAS: Fix test failures due to jr encoding changes on r6YunQiang Su6-5/+14
2023-11-23RISC-V: Add vector permutation instructions for T-Head VECTOR vendor extensionJin Ma2-0/+68
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds permutation instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for permutation instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VMVXS): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add vector mask instructions for T-Head VECTOR vendor extensionJin Ma2-0/+56
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds mask instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for mask instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VMPOPCM): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add reductions instructions for T-Head VECTOR vendor extensionJin Ma2-0/+68
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds reductions instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for reductions instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add floating-point arithmetic instructions for T-Head VECTOR vendor ↵Jin Ma2-0/+358
extension T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds floating-point arithmetic instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for floating-point arithmetic instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VFSQRTV): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add fixed-point arithmetic instructions for T-Head VECTOR vendor ↵Jin Ma2-0/+178
extension T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds fixed-point arithmetic instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for fixed-point arithmetic instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VAADDVV): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add integer arithmetic instructions for T-Head VECTOR vendor extensionJin Ma2-0/+657
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds integer arithmetic instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for integer arithmetic instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VADCVVM): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extensionJin Ma3-0/+161
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the sub-extension "XTheadZvamo" for the "XTheadVector" extension, and it provides AMO instructions for T-Head VECTOR vendor extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Add support for "XTheadZvamo" extension. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * doc/c-riscv.texi: * testsuite/gas/riscv/x-thead-vector-zvamo.d: New test. * testsuite/gas/riscv/x-thead-vector-zvamo.s: New test. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VAMOADDWV): New. * opcode/riscv.h (enum riscv_insn_class): Add insn class. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add load/store segment instructions for T-Head VECTOR vendor extensionJin Ma2-0/+1708
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds provides load/store segment instructions for T-Head VECTOR vendor extension, which same as the "Zvlsseg" extension in RVI 0.71 vector extension, but belongs to the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add test. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VLSEG2BV): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add load/store instructions for T-Head VECTOR vendor extensionJin Ma2-0/+268
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds load/store instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: Add tests for load/store instructions. * testsuite/gas/riscv/x-thead-vector.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_VLBV): New. opcodes/ChangeLog: * riscv-opc.c: Likewise.
2023-11-23RISC-V: Add configuration-setting instructions for T-Head VECTOR vendor ↵Jin Ma2-0/+15
extension T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds configuration-setting instructions for the "XTheadVector" extension. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * testsuite/gas/riscv/x-thead-vector.d: New test. * testsuite/gas/riscv/x-thead-vector.s: New test. opcodes/ChangeLog: * riscv-opc.c: Likewise..
2023-11-23RISC-V: Add CSRs for T-Head VECTOR vendor extensionJin Ma5-0/+57
T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the CSRs for XTheadVector. Because of the conflict between encoding and teh 'V' extension, it is implemented by alias. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add the class for the CSRs of the "XTheadVector" extension. (riscv_csr_address): Likewise. * testsuite/gas/riscv/x-thead-vector-csr-warn.d: New test. * testsuite/gas/riscv/x-thead-vector-csr-warn.l: New test. * testsuite/gas/riscv/x-thead-vector-csr.d: New test. * testsuite/gas/riscv/x-thead-vector-csr.s: New test. include/ChangeLog: * opcode/riscv-opc.h (DECLARE_CSR_ALIAS): Likewise. opcodes/ChangeLog: * riscv-dis.c (print_insn_args): Prefix the CSRs disassembly with 'th'.
2023-11-23RISC-V: Add T-Head VECTOR vendor extension.Jin Ma5-0/+13
T-Head has a range of vendor-specific instructions ([2]). Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the "XTheadVector" extension, a collection of T-Head-specific vector instructions. The 'th' prefix and the "XTheadVector" extension are documented in a PR for the RISC-V toolchain conventions ([1]). Here are some things that need to be explained: The "XTheadVector" extension is not a custom-extension, but a non-standard non-conforming extension. The encoding space of the "TheadVector" instructions overlaps with those of the 'V' extension. This encoding space conflict is not on purpose, but the result of issues in the past that have been resolved since. Therefore, the "XTheadVector" extension and the 'V' extension are in conflict. [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 [2] https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.3.0/xthead-2023-11-10-2.3.0.pdf Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Co-developed-by: Christoph Müllner <christoph.muellner@vrull.eu> bfd/ChangeLog: * elfxx-riscv.c (riscv_parse_check_conflicts): The "XTheadVector" extension and the 'V' extension are in conflict. (riscv_multi_subset_supports): Likewise.. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * doc/c-riscv.texi: * testsuite/gas/riscv/x-thead-vector-fail.d: New test. * testsuite/gas/riscv/x-thead-vector-fail.l: New test. * testsuite/gas/riscv/x-thead-vector.s: New test. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class):
2023-11-22LoongArch: fix internal error when as handling unsupported modifier.Lulu Cai4-1/+13
2023-11-21bpf: Fixed register parsing disambiguating with possible symbol.Cupertino Miranda2-0/+7
This changes parse_bpf_register to detect possible symbols that start with valid register name, however due some following characters are not. Also changed the regs-for-symbols-pseudo.s, adding some entries that should not error if parser is properly detecting the symbol.
2023-11-18gas: bpf: do not allow referring to register names as symbols in operandsJose E. Marchesi7-49/+102
2023-11-18 Jose E. Marchesi <jemarch@gnu.org> * config/tc-bpf.c (parse_bpf_register): Move before bpf_parse_name. (bpf_parse_name): Do not allow using symbols that are also register names as operands in pseudo-c syntax. * testsuite/gas/bpf/regs-for-symbols-pseudoc.d: New file. * testsuite/gas/bpf/regs-for-symbols-pseudoc.s: Likewise. * testsuite/gas/bpf/regs-for-symbols-pseudoc.l: Likewise. * doc/c-bpf.texi (BPF Registers): Document that it is not possible to refer to register names as symbols in instruction operands.
2023-11-17bpf: avoid creating wrong symbols while parsingDavid Faust5-0/+107
To support the "pseudo-C" asm dialect in BPF, the BPF parser must often attempt multiple different templates for a single instruction. In some cases this can cause the parser to incorrectly parse part of the instruction opcode as an expression, which leads to the creation of a new undefined symbol. Once the parser recognizes the error, the expression is discarded and it tries again with a new instruction template. However, symbols created during the process are added to the symbol table and are not removed even if the expression is discarded. This is a problem for BPF: generally the assembled object will be loaded directly to the Linux kernel, without being linked. These erroneous parser-created symbols are rejected by the kernel BPF loader, and the entire object is refused. This patch remedies the issue by tentatively creating symbols while parsing instruction operands, and storing them in a temporary list rather than immediately inserting them into the symbol table. Later, after the parser is sure that it has correctly parsed the instruction, those symbols are committed to the real symbol table. This approach is modeled directly after Jan Beulich's patch for RISC-V: commit 7a29ee290307087e1749ce610207e93a15d0b78d RISC-V: adjust logic to avoid register name symbols Many thanks to Jan for recognizing the problem as similar, and pointing me to that patch. gas/ * config/tc-bpf.c (parsing_insn_operands): New. (parse_expression): Set it here. (deferred_sym_rootP, deferred_sym_lastP): New. (orphan_sym_rootP, orphan_sym_lastP): New. (bpf_parse_name): New. (parse_error): Clear deferred symbol list on error. (md_assemble): Clear parsing_insn_operands. Commit deferred symbols to symbol table on successful parse. * config/tc-bpf.h (md_parse_name): Define to... (bpf_parse_name): ...this. New prototype. * testsuite/gas/bpf/asm-extra-sym-1.s: New test source. * testsuite/gas/bpf/asm-extra-sym-1.d: New test. * testsuite/gas/bpf/bpf.exp: Run new test.
2023-11-17x86: improve a few diagnosticsJan Beulich9-84/+93
PR gas/31043 "unsupported instruction ..." can mean about anything, and can also be mistaken to mean something that isn't meant. Replace most of its uses by more specific diagnostics, While there also take the opportunity and purge the no longer used invalid_register_operand enumerator.
2023-11-17x86: don't allow pseudo-prefixes to be overridden by legacy suffixesJan Beulich1-3/+19
Deprecated functionality would better not win over its modern counterparts.
2023-11-17x86: CPU-qualify {disp16} / {disp32}Jan Beulich5-19/+68
{disp16} is invalid to use in 64-bit mode, while {disp32} is invalid to use on pre-386 CPUs. The latter, also affecting other (real) prefixes, further requires that like for insns we fully check the CPU flags; till now only Cpu64/CpuNo64 were taken into consideration.
2023-11-17x86: use IS_ELFJan Beulich2-7/+4
... instead of (inefficiently) open-coding it.
2023-11-17x86: conditionally hide object-format-specific functionsJan Beulich2-23/+31
ELF-only functions don't need to be built when dealing with a non-ELF target. md_section_align() also doesn't need to be a function when dealing with non-AOUT targets. Similarly tc_fix_adjustable() can be a simple macro when building non-ELF targets. Furthermore x86_elf_abi is already used in ELF-only code sections, with one exception. By adjusting that, the otherwise bogusly named variable can also be confined to just ELF builds.
2023-11-17x86: fold conditionals in check_long_reg()Jan Beulich1-13/+5
Simplify the code follow ing what check_{,q}word_reg() already do. This the also eliminates a stale comment talking about a warning when an error is raised. While there, correct a similarly stale comment in check_qword_reg() while there.
2023-11-17x86-64: extend expected-size check in check_qword_reg()Jan Beulich3-19/+26
Due to a missing check "crc32q %al, %rax" was wrongly translated to the encoding of "crc32q %rax, %rax", rather than being rejected as invalid. (The mnemonic suffix describes the source operand, not the destination one.) Note that check_{word,long}_reg() do not (currently) appear to require similar amending, as there are no insn templates permitting an L or W suffix and having an operand which allows for Reg8 and Reg64, but neither Reg16 nor Reg32.
2023-11-16aarch64: Add support for VMSA feature enhancements.Srinath Parvathaneni3-0/+166
This patch adds the permission model enhancement and memory attribute index enhancement features and their corresponding system registers in AArch64 assembler. Permission Indirection Extension (FEAT_S1PIE, FEAT_S2PIE) Permission Overlay Extension (FEAT_S1POE, FEAT_S2POE) Memory Attribute Index Enhancement (FEAT_AIE) Extension to Translation Control Registers (FEAT_TCR2) These features are available by default from Armv9.4-A architecture.
2023-11-16aarch64: Add new AT system instructions.Srinath Parvathaneni3-0/+11
This patch adds 3 new AT system instructions through FEAT_ATS1A feature, which are available by default from Armv9.4-A architecture.
2023-11-16aarch64: Add support to new features in RAS extension.Srinath Parvathaneni8-5/+87
This patch also adds support for: 1. FEAT_RASv2 feature and "ERXGSR_EL1" system register. RASv2 feature is enabled by passing +rasv2 to -march (eg: -march=armv8-a+rasv2). 2. FEAT_SCTLR2 and following system registers. SCTLR2_EL1, SCTLR2_EL12, SCTLR2_EL2 and SCTLR2_EL3. 3. FEAT_FGT2 and following system registers. HDFGRTR2_EL2, HDFGWTR2_EL2, HFGRTR2_EL2, HFGWTR2_EL2 4. FEAT_PFAR and following system registers. PFAR_EL1, PFAR_EL2 and PFAR_EL12. FEAT_RASv2, FEAT_SCTLR2, FEAT_FGT2 and FEAT_PFAR features are by default enabled from Armv9.4-A architecture. This patch also adds support for two read only system registers id_aa64mmfr3_el1 and id_aa64mmfr4_el1, which are available from Armv8-A Architecture.
2023-11-16aarch64: Add features to the Statistical Profiling Extension.Srinath Parvathaneni4-0/+18
This patch adds features to the Statistical Profiling Extension, identified as FEAT_SPEv1p4, FEAT_SPE_FDS, and FEAT_SPE_CRR, which are enabled by default from Armv9.4-A. Also adds support for system register "pmsdsfr_el1".
2023-11-16aarch64: Add SLC target for PRFM instruction.Srinath Parvathaneni2-26/+32
This patch adds support for FEAT_PRFMSLC feature which enables SLC target for PRFM instructions.
2023-11-15GAS/MIPS: add "--defsym r6=" for default when it's r6YunQiang Su2-0/+10
* testsuite/gas/mips/mips.exp (mips_arch_create): Add "--defsym r6=" to as_flags for r6 targets.
2023-11-15Finalized intl-update patchesArsen Arsenovi?6-1358/+3522
* intl: Remove directory. Replaced with out-of-tree GNU gettext. * .gitignore: Add '/gettext*'. * configure.ac (host_libs): Replace intl with gettext. (hbaseargs, bbaseargs, baseargs): Split baseargs into {h,b}baseargs. (skip_barg): New flag. Skips appending current flag to bbaseargs. <library exemptions>: Exempt --with-libintl-{type,prefix} from target and build machine argument passing. * configure: Regenerate. * Makefile.def (host_modules): Replace intl module with gettext module. (configure-ld): Depend on configure-gettext. * Makefile.in: Regenerate. * src-release.sh: Remove references to the intl/ directory.
2023-11-15MIPS: Fix Irix gas testcases about pdr sectionYunQiang Su10-7/+40
* testsuite/gas/elf/elf.exp (section2): Add -mpdr option to assembler command line for mips-irix targets. * testsuite/gas/mips/elf-rel26.d: Add -mpdr command line option. * testsuite/gas/mips/mips16-e.d: Likewise. * testsuite/gas/mips/mips16-f.d: Likewise. * testsuite/gas/mips/mips16-hilo-match.d: Likewise. * testsuite/gas/mips/mips16-e-irix.d: Likewise. * testsuite/gas/mips/call-nonpic-1.d: Adjust regexp to allow for mips-irix targets. * testsuite/gas/mips/irix-no-pdr.d: New test file. * testsuite/gas/mips/mips.exp: Run new test for mips-irix targets.
2023-11-13Regenerate gas/config.in and ld/configureMark Wielaard1-3/+3
commit d173146d9 "MIPS: Change all E_MIPS_* to EF_MIPS_*" changed gas/config.in to rename USE_E_MIPS_ABI_O32 to USE_EF_MIPS_ABI_O32 this new name sorts differently when regenerating gas/config.in commit e922d1eaa "Add ability to change linker warning messages into errors when reporting executable stacks and/or executable segments." Introduced two new help strings for --enable-error-execstack and --enable-error-rwx-segments in configure.ac which weren't included in ld/configure when regenerated. * gas/config.in: Regenerate. * ld/configure: Likewise.
2023-11-13Add documentation for the MIPS assembler's -march=from-abi command line optionNick Clifton1-0/+5
2023-11-10GAS/MIPS: Fix testcase module-defer-warn2 for r2+ triplesYunQiang Su4-1/+14
generated by cgit v1.1 at 2024-09-08 04:17:24 +0000