aarch64: Add support to new features in RAS extension.

This patch also adds support for:
1. FEAT_RASv2 feature and "ERXGSR_EL1" system register.
RASv2 feature is enabled by passing +rasv2 to -march
(eg: -march=armv8-a+rasv2).

2. FEAT_SCTLR2 and following system registers.
SCTLR2_EL1, SCTLR2_EL12, SCTLR2_EL2 and SCTLR2_EL3.

3. FEAT_FGT2 and following system registers.
HDFGRTR2_EL2, HDFGWTR2_EL2, HFGRTR2_EL2, HFGWTR2_EL2

4. FEAT_PFAR and following system registers.
PFAR_EL1, PFAR_EL2 and PFAR_EL12.

FEAT_RASv2, FEAT_SCTLR2, FEAT_FGT2 and FEAT_PFAR features are by default
enabled from Armv9.4-A architecture.

This patch also adds support for two read only system registers
id_aa64mmfr3_el1 and id_aa64mmfr4_el1, which are available from
Armv8-A Architecture.

8 files changed, 87 insertions, 5 deletions

diff --git a/gas/NEWS b/gas/NEWS
index ddf48fc..9d0fb3b 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,5 +1,8 @@
 -*- text -*-
 
+* Add support for Reliability, Availability and Serviceability extension v2
+  (RASv2) for AArch64.
+
 * Add support for 128-bit Atomic Instructions (LSE128) for AArch64.
 
 * Add support for Guarded Control Stack (GCS) for AArch64.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 70c0ed6..5646de7 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10292,6 +10292,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"chk",		AARCH64_FEATURE (CHK), AARCH64_NO_FEATURES},
   {"gcs",		AARCH64_FEATURE (GCS), AARCH64_NO_FEATURES},
   {"the",		AARCH64_FEATURE (THE), AARCH64_NO_FEATURES},
+  {"rasv2",		AARCH64_FEATURE (RASv2), AARCH64_FEATURE (RAS)},
   {NULL,		AARCH64_NO_FEATURES, AARCH64_NO_FEATURES},
 };
 
diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 81c1818..cbf06bf 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -267,7 +267,8 @@ automatically cause those extensions to be disabled.
  @tab Enable Translation Hardening extension.
 @item @code{lse128} @tab Armv9.4-A @tab No
  @tab Enable the 128-bit Atomic Instructions extension.  This implies @code{lse}.
-
+@item @code{rasv2} @tab N/A @tab Armv9.4-A or later
+ @tab Enable the Reliability, Availability and Serviceability extension v2.
 @end multitable
 
 @node AArch64 Syntax
diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l
index 48c5568..63397bc 100644
--- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l
+++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l
@@ -1,3 +1,26 @@
 .*: Assembler messages:
 .*: Error: selected processor does not support system register name 'pmsdsfr_el1'
 .*: Error: selected processor does not support system register name 'pmsdsfr_el1'
+.*: Error: selected processor does not support system register name 'erxgsr_el1'
+.*: Error: selected processor does not support system register name 'sctlr2_el1'
+.*: Error: selected processor does not support system register name 'sctlr2_el12'
+.*: Error: selected processor does not support system register name 'sctlr2_el2'
+.*: Error: selected processor does not support system register name 'sctlr2_el3'
+.*: Error: selected processor does not support system register name 'sctlr2_el1'
+.*: Error: selected processor does not support system register name 'sctlr2_el12'
+.*: Error: selected processor does not support system register name 'sctlr2_el2'
+.*: Error: selected processor does not support system register name 'sctlr2_el3'
+.*: Error: selected processor does not support system register name 'hdfgrtr2_el2'
+.*: Error: selected processor does not support system register name 'hdfgwtr2_el2'
+.*: Error: selected processor does not support system register name 'hfgrtr2_el2'
+.*: Error: selected processor does not support system register name 'hfgwtr2_el2'
+.*: Error: selected processor does not support system register name 'hdfgrtr2_el2'
+.*: Error: selected processor does not support system register name 'hdfgwtr2_el2'
+.*: Error: selected processor does not support system register name 'hfgrtr2_el2'
+.*: Error: selected processor does not support system register name 'hfgwtr2_el2'
+.*: Error: selected processor does not support system register name 'pfar_el1'
+.*: Error: selected processor does not support system register name 'pfar_el2'
+.*: Error: selected processor does not support system register name 'pfar_el12'
+.*: Error: selected processor does not support system register name 'pfar_el1'
+.*: Error: selected processor does not support system register name 'pfar_el2'
+.*: Error: selected processor does not support system register name 'pfar_el12'
diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d
index d4cb769..3b66e2b 100644
--- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d
+++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d
@@ -8,3 +8,26 @@ Disassembly of section \.text:
 0+ <.*>:
 .*:	d53c9a83 	mrs	x3, pmsdsfr_el1
 .*:	d51c9a83 	msr	pmsdsfr_el1, x3
+.*:	d5385340 	mrs	x0, erxgsr_el1
+.*:	d5181063 	msr	sctlr2_el1, x3
+.*:	d51d1063 	msr	sctlr2_el12, x3
+.*:	d51c1063 	msr	sctlr2_el2, x3
+.*:	d51e1063 	msr	sctlr2_el3, x3
+.*:	d5381063 	mrs	x3, sctlr2_el1
+.*:	d53d1063 	mrs	x3, sctlr2_el12
+.*:	d53c1063 	mrs	x3, sctlr2_el2
+.*:	d53e1063 	mrs	x3, sctlr2_el3
+.*:	d53c3103 	mrs	x3, hdfgrtr2_el2
+.*:	d53c3123 	mrs	x3, hdfgwtr2_el2
+.*:	d53c3143 	mrs	x3, hfgrtr2_el2
+.*:	d53c3163 	mrs	x3, hfgwtr2_el2
+.*:	d51c3103 	msr	hdfgrtr2_el2, x3
+.*:	d51c3123 	msr	hdfgwtr2_el2, x3
+.*:	d51c3143 	msr	hfgrtr2_el2, x3
+.*:	d51c3163 	msr	hfgwtr2_el2, x3
+.*:	d53860a0 	mrs	x0, pfar_el1
+.*:	d53c60a0 	mrs	x0, pfar_el2
+.*:	d53d60a0 	mrs	x0, pfar_el12
+.*:	d51860a0 	msr	pfar_el1, x0
+.*:	d51c60a0 	msr	pfar_el2, x0
+.*:	d51d60a0 	msr	pfar_el12, x0
diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s
index 4200d7c..9ad0a53 100644
--- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s
+++ b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s
@@ -1,2 +1,29 @@
 	mrs x3, PMSDSFR_EL1
 	msr PMSDSFR_EL1, x3
+
+	mrs x0, ERXGSR_EL1
+
+	msr SCTLR2_EL1, x3
+	msr SCTLR2_EL12, x3
+	msr SCTLR2_EL2, x3
+	msr SCTLR2_EL3, x3
+	mrs x3, SCTLR2_EL1
+	mrs x3, SCTLR2_EL12
+	mrs x3, SCTLR2_EL2
+	mrs x3, SCTLR2_EL3
+
+	mrs x3, HDFGRTR2_EL2
+	mrs x3, HDFGWTR2_EL2
+	mrs x3, HFGRTR2_EL2
+	mrs x3, HFGWTR2_EL2
+	msr HDFGRTR2_EL2, x3
+	msr HDFGWTR2_EL2, x3
+	msr HFGRTR2_EL2, x3
+	msr HFGWTR2_EL2, x3
+
+	mrs x0, PFAR_EL1
+	mrs x0, PFAR_EL2
+	mrs x0, PFAR_EL12
+	msr PFAR_EL1, x0
+	msr PFAR_EL2, x0
+	msr PFAR_EL12, x0
diff --git a/gas/testsuite/gas/aarch64/sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg-2.d
index 097f272..ac0a862 100644
--- a/gas/testsuite/gas/aarch64/sysreg-2.d
+++ b/gas/testsuite/gas/aarch64/sysreg-2.d
@@ -7,10 +7,12 @@
 Disassembly of section .text:
 
 0+ <.*>:
-   [0-9a-f]+:	d5380725 	mrs	x5, id_aa64mmfr1_el1
-   [0-9a-f]+:	d5380747 	mrs	x7, id_aa64mmfr2_el1
-   [0-9a-f]+:	d5385305 	mrs	x5, erridr_el1
-   [0-9a-f]+:	d5185327 	msr	errselr_el1, x7
+.*:	d5380725 	mrs	x5, id_aa64mmfr1_el1
+.*:	d5380747 	mrs	x7, id_aa64mmfr2_el1
+.*:	d5380769 	mrs	x9, id_aa64mmfr3_el1
+.*:	d538078b 	mrs	x11, id_aa64mmfr4_el1
+  [0-9a-f]+:	d5385305 	mrs	x5, erridr_el1
+  [0-9a-f]+:	d5185327 	msr	errselr_el1, x7
   [0-9a-f]+:	d5385327 	mrs	x7, errselr_el1
   [0-9a-f]+:	d5385405 	mrs	x5, erxfr_el1
   [0-9a-f]+:	d5185425 	msr	erxctlr_el1, x5
diff --git a/gas/testsuite/gas/aarch64/sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg-2.s
index 57eb08f..ae2bb14 100644
--- a/gas/testsuite/gas/aarch64/sysreg-2.s
+++ b/gas/testsuite/gas/aarch64/sysreg-2.s
@@ -13,6 +13,8 @@
 
 	rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x5 r=1 w=0
 	rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x7 r=1 w=0
+	rw_sys_reg sys_reg=id_aa64mmfr3_el1 xreg=x9 r=1 w=0
+	rw_sys_reg sys_reg=id_aa64mmfr4_el1 xreg=x11 r=1 w=0
 
 	/* RAS extension.  */