rocket-tools/riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2017-01-11	Add support for x86/64 redox target.	Jeremy Soller	2	-0/+5
2017-01-10	Fix sleb128-8 regressions.	Tristan Gingold	3	-2/+7
2017-01-10	Updated Swedish translations for GAS and LD	Nick Clifton	2	-700/+719
2017-01-10	This patch ensure same output for sleb128 with large number.	Tristan Gingold	5	-3/+29
2017-01-09	RISC-V/GAS: Support more relocs against constant addresses	Andrew Waterman	2	-3/+8
2017-01-09	RISC-V/GAS: Improve handling of invalid relocs	Andrew Waterman	2	-1/+15
2017-01-09	Remove some custom sections from RISC-V's default linker scripts	Palmer Dabbelt	1	-0/+7
2017-01-09	Add Swedish translation for GAS.	Nick Clifton	4	-2/+19967
2017-01-09	RISC-V/GAS: Correct branch relaxation for weak symbols.	Andrew Waterman	2	-0/+6
2017-01-04	[AArch64] Add separate feature flag for weaker release consistent load insns	Szabolcs Nagy	5	-0/+33
2017-01-04	When configuring GAS treat as sparcv9 target the same way as a sparc64 target.	Norm Jacobs	2	-1/+6
2017-01-03	Add support for the Q extension to the RISCV ISA.	Kito Cheng	2	-2/+19
2017-01-03	Fix PRU GAS for 32-bit hosts	Dimitar Dimitrov	2	-7/+18
2017-01-02	Update year range in copyright notice of all files.	Alan Modra	560	-562/+566
2017-01-02	ChangeLog rotation	Alan Modra	2	-6012/+6026
2016-12-31	PRU GAS Port	Dimitar Dimitrov	36	-0/+2830
2016-12-23	MIPS16: Add ASMACRO instruction support	Maciej W. Rozycki	6	-0/+79
2016-12-23	MIPS16: Simplify extended operand handling	Maciej W. Rozycki	2	-1/+6
2016-12-23	MIPS16/GAS: Clean up invalid unextended operand handling	Maciej W. Rozycki	9	-2/+245
2016-12-23	MIPS16: Reassign `0' and `4' operand codes	Maciej W. Rozycki	2	-5/+11
2016-12-23	MIPS16: Handle non-extensible instructions correctly	Maciej W. Rozycki	25	-43/+1135
2016-12-23	MIPS16: Remove "extended" BREAK/SDBBP handling	Maciej W. Rozycki	2	-8/+6
2016-12-23	MIPS16/GAS: Fix forced size suffixes with argumentless instructions	Maciej W. Rozycki	5	-10/+51
2016-12-23	MIPS16/GAS: Disallow EXTEND delay-slot scheduling	Maciej W. Rozycki	4	-0/+50
2016-12-23	[msp430] Sync tc-msp430.c with devices.csv	Joe Seymour	2	-6/+10
2016-12-23	Bump version to 2.28.51	Tristan Gingold	2	-10/+14
2016-12-23	Add marker in NEWS files	Tristan Gingold	2	-0/+6
2016-12-23	Regenerate pot files.	Tristan Gingold	2	-3992/+4933
2016-12-22	ChangeLog formatting fixes	Alan Modra	1	-2/+2
2016-12-22	Support aligning text section from odd addresses	Andrew Waterman	2	-6/+21
2016-12-22	Fix a const-safety issue on GCC-4.9 and above	Tim Newsome	2	-1/+6
2016-12-21	Remove high bit set characters	Alan Modra	3	-6/+11
2016-12-21	Document character escape sequences	Alan Modra	2	-6/+12
2016-12-20	MIPS16/opcodes: Respect ISA and ASE in disassembly	Maciej W. Rozycki	15	-0/+1681
2016-12-20	MIPS/GAS/testsuite: Add RESTORE instruction to `mips16e' test	Maciej W. Rozycki	3	-1/+8
2016-12-20	MIPS/GAS/testsuite: Extend MIPS16 testing over multiple ISAs	Maciej W. Rozycki	24	-167/+1990
2016-12-20	MIPS/GAS/testsuite: Implement individual MIPS16 ISA testing	Maciej W. Rozycki	6	-7/+177
2016-12-20	MIPS/GAS/testsuite: Fix trailing padding in `loc-swap.s'	Maciej W. Rozycki	5	-4/+11
2016-12-20	MIPS16: Switch to 32-bit opcode table interpretation	Maciej W. Rozycki	14	-24/+375
2016-12-20	MIPS16/opcodes: Correct 64-bit macros' ISA membership	Maciej W. Rozycki	3	-0/+18
2016-12-20	MIPS16/opcodes: Correct I64/SDRASP opcode's ISA membership	Maciej W. Rozycki	5	-0/+20
2016-12-20	MIPS/GAS/testsuite: Correct NewABI test selection	Maciej W. Rozycki	2	-27/+84
2016-12-20	Don't define RISC-V .p2align	Andrew Waterman	3	-42/+82
2016-12-20	Re-work RISC-V gas flags: now we just support -mabi and -march	Andrew Waterman	5	-123/+122
2016-12-20	Rework RISC-V relocations	Andrew Waterman	3	-54/+185
2016-12-20	Formatting changes for RISC-V	Andrew Waterman	2	-27/+32
2016-12-14	MIPS16/GAS: Fix assertion failures with relocations on 16-bit instructions	Maciej W. Rozycki	8	-3/+50
2016-12-14	MIPS16: Fix SP-relative SD instruction annotation	Maciej W. Rozycki	4	-0/+51
2016-12-13	[Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm field	Renlin Li	4	-123/+134
2016-12-13	[AArch64] Make GAS testcases support ILP32 mode	Jiong Wang	110	-210/+346