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2015-07-21Release 2.25.1, add generated filesbinutils-2_25_1Tristan Gingold4-679/+693
2015-07-10Remove ppc860, ppc750cl, ppc7450 insns from common ppc.Alan Modra5-3/+14
2015-07-10PPC sync instruction accepts invalid and incompatible operandsPeter Bergner3-4/+8
2015-07-10Allow for optional operands with non-zero default values.Peter Bergner6-6/+21
2015-07-10Add hwsync extended mnemonic.Peter Bergner4-4/+26
2015-07-10Fix powerpc gas abort on invalid instruction fixupsAlan Modra2-3/+30
2015-06-19Import fix for PR 18481 which corrects the generation of relocs for R_ARM_TLS...Nick Clifton5-2/+56
2015-06-18[ARM][GAS] Backport "Positively emit symbols for alignment"Renlin Li5-23/+39
2015-06-18[AArch64][GAS] Backport "Positively emit symbols for alignment"Jiong Wang7-14/+71
2015-06-16[AArch64] Backport support id_mmfr4 system registerJiong Wang3-11/+21
2015-06-04[AArch64] Backport fix for minimum code section alignmentMatthew Wahab5-1/+36
2015-05-14Fix some PPC assembler errors.Peter Bergner7-9/+33
2015-05-07[AArch64][Backport] Remove Load/Store register (unscaled immediate) aliasRenlin Li4-199/+208
2015-05-07[AArch64][Backport] Don't always create new frag for .inst directiveRenlin Li2-1/+21
2015-04-28opcodes/Peter Bergner8-140/+127
2015-04-06Add support for the Samsung Exynos M1 processor.Evandro Menezes3-0/+9
2015-04-06Add support for the Samsung Exynos M1 processor.Evandro Menezes3-0/+9
2015-04-04Don't pass unadorned zeros to varargs functionsYaakov Selkowitz2-2/+9
2015-03-20Limit multi-byte nop instructions to 10 bytesH.J. Lu45-3106/+923
2015-03-11[AArch64][2.25] Backport support for Cortex-A72Matthew Wahab3-0/+8
2015-03-11[ARM][2.25] Backport support for Cortex-A72Matthew Wahab2-0/+6
2015-02-11Assorted compiler warning fixesAlan Modra2-2/+5
2015-02-11PowerPC register numbers in DWARFAlan Modra4-3/+47
2015-01-28[ARM] Backport vcmp/vcmpe should accept #0x0 as an operandJiong Wang6-9/+38
2014-12-23Bump to version 2.25.0Tristan Gingold2-10/+14
2014-12-23Add generated files.binutils-2_25Tristan Gingold23-0/+57078
2014-12-23Version 2.25Tristan Gingold2-10/+14
2014-12-19Rework the alignment check for BFD_RELOC_MIPS_18_PCREL_S3.Matthew Fortune9-26/+93
2014-12-19Add in a JALRC alias and fix the NAL instruction.Matthew Fortune5-0/+19
2014-11-30Power4 should treat mftb as extended mfspr mnemonicAlan Modra3-3/+8
2014-11-18Add -z bndplt to generate BND prefix in PLT entriesIgor Zamyatin6-64/+58
2014-11-18[AArch64] Add xgene2.Philipp Tomsich3-1/+9
2014-11-18[AArch64] Add xgene1.Philipp Tomsich3-1/+10
2014-11-18[AArch64] Enable CRC feature in GAS for cortex-a53 and cortex-a57.Marcus Shawcroft2-2/+10
2014-11-18Revert "[AArch64] Enable CRC feature in GAS for cortex-a53 and cortex-a57."Marcus Shawcroft2-11/+2
2014-11-17Merge branch 'binutils-2_25-branch' of ssh://sourceware.org/git/binutils-gdb ...Nick Clifton41-1/+2934
2014-11-17Applies a series of patches for PR 17512 and 17533 which fix invalid memory a...Nick Clifton2-0/+11
2014-11-17Add AVX512VBMI instructionsIlya Tocar17-1/+1585
2014-11-17Add AVX512IFMA instructionsIlya Tocar17-1/+1141
2014-11-17Add pcommit instructionIlya Tocar11-1/+99
2014-11-17Add clwb instructionIlya Tocar11-0/+111
2014-11-14Correct x86 assembler manualH.J. Lu3-23/+30
2014-11-14[AArch64] Enable CRC feature in GAS for cortex-a53 and cortex-a57.Marcus Shawcroft2-2/+11
2014-11-12Fix x86 non-ELF build breakageAlan Modra2-0/+8
2014-11-11Update French and Ukranian translations with new one supplied by the Translat...Nick Clifton2-109/+144
2014-11-10Update .MIPS.abiflags to support MIPS R6Matthew Fortune6-0/+65
2014-11-07X32: Add REX prefix to encode R_X86_64_GOTTPOFFH.J. Lu5-0/+53
2014-11-03Fixes a snafu checking the size of a 20-bit immediate.Nick Clifton2-2/+8
2014-10-30Remove the artificial limit on code alignment through the use of theDr Philipp Tomsich3-46/+38
2014-10-29Updated and New translations from the Translation Project.Nick Clifton2-0/+19698
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