Age | Commit message (Expand) | Author | Files | Lines |
2023-11-28 | gas: change meaning of ; in the BPF assembler | Jose E. Marchesi | 1 | -3/+10 |
2023-11-23 | RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extension | Jin Ma | 1 | -0/+6 |
2023-11-23 | RISC-V: Add T-Head VECTOR vendor extension. | Jin Ma | 1 | -0/+5 |
2023-11-18 | gas: bpf: do not allow referring to register names as symbols in operands | Jose E. Marchesi | 1 | -1/+6 |
2023-11-16 | aarch64: Add support to new features in RAS extension. | Srinath Parvathaneni | 1 | -1/+2 |
2023-11-13 | Add documentation for the MIPS assembler's -march=from-abi command line option | Nick Clifton | 1 | -0/+5 |
2023-11-07 | aarch64: Add arch support for LSE128 extension | Victor Do Nascimento | 1 | -0/+2 |
2023-11-07 | aarch64: Add THE system register support | Victor Do Nascimento | 1 | -0/+3 |
2023-11-07 | RISC-V: Add support for XCValu extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2023-11-07 | RISC-V: Add support for XCVmac extension in CV32E40P | Mary Bennett | 1 | -0/+5 |
2023-11-02 | aarch64: Add support for GCS extension. | srinath | 1 | -0/+2 |
2023-11-02 | aarch64: Add support for Check Feature Status Extension. | Srinath Parvathaneni | 1 | -0/+2 |
2023-11-02 | aarch64: Add support for Armv8.9-A and Armv9.4-A Architectures. | srinath | 1 | -2/+2 |
2023-10-31 | Support Intel USER_MSR | Hu, Lin1 | 1 | -1/+2 |
2023-10-16 | RISC-V: Add "lp64e" ABI support | Tsukasa OI | 1 | -3/+2 |
2023-10-05 | aarch64: Enable Cortex-X4 CPU | Saurabh Jha | 1 | -1/+2 |
2023-09-28 | Added support in gas for mlittle-endian and mbig-endian flags as options. | Michael J. Eager | 2 | -1/+17 |
2023-09-14 | x86: support AVX10.1 vector size restrictions | Jan Beulich | 1 | -1/+14 |
2023-09-14 | x86: support AVX10.1/512 | Jan Beulich | 1 | -1/+2 |
2023-09-07 | RISC-V: Clarify the naming rules of vendor operands. | Nelson Chu | 1 | -1/+2 |
2023-08-25 | gas/ELF: allow "inheriting" section attributes and type | Jan Beulich | 1 | -0/+12 |
2023-08-21 | bpf: correct neg and neg32 instruction encoding | David Faust | 1 | -16/+0 |
2023-08-17 | bpf: gas: consolidate handling of immediate overflows | Jose E. Marchesi | 1 | -0/+8 |
2023-08-16 | kvx: New port. | Paul Iannetta | 4 | -0/+156 |
2023-08-16 | aarch64: Enable Cortex-A720 CPU | Richard Ball | 1 | -0/+1 |
2023-08-10 | aarch64: Enable Cortex-A520 CPU | Richard Ball | 1 | -0/+1 |
2023-08-05 | as: Fix typo in manual | David Carew | 1 | -1/+1 |
2023-08-02 | Revert "2.41 Release sources" | Sam James | 3 | -296/+614 |
2023-08-02 | 2.41 Release sourcesbinutils-2_41-release | Nick Clifton | 3 | -614/+296 |
2023-08-01 | gas: rework timestamp preservation on doc/asconfig.texi | Jan Beulich | 1 | -1/+1 |
2023-07-28 | bpf: gas: support relaxation of V4 jump instructions | Jose E. Marchesi | 1 | -0/+4 |
2023-07-27 | Support Intel PBNDKB | Hu, Lin1 | 1 | -0/+2 |
2023-07-27 | Support Intel SM4 | Haochen Jiang | 1 | -1/+2 |
2023-07-27 | Support Intel SM3 | Haochen Jiang | 1 | -1/+2 |
2023-07-27 | Support Intel SHA512 | Haochen Jiang | 1 | -1/+2 |
2023-07-27 | Support Intel AVX-VNNI-INT16 | konglin1 | 1 | -2/+3 |
2023-07-26 | bpf: accept # as an inline comment char | David Faust | 1 | -3/+2 |
2023-07-26 | bpf: fix register NEG[32] instructions | Jose E. Marchesi | 1 | -4/+4 |
2023-07-25 | bpf: Add atomic compare-and-exchange instructions | David Faust | 1 | -4/+40 |
2023-07-25 | bpf: Update atomic instruction pseudo-C syntax | David Faust | 1 | -24/+22 |
2023-07-24 | bpf: gas,include,opcode: add suppor for instructions BSWAP{16,32,64} | Jose E. Marchesi | 1 | -0/+20 |
2023-07-24 | bpf: gas: fix in manual that MOVS* pseudoc syntax uses = instead of s= | Jose E. Marchesi | 1 | -6/+6 |
2023-07-24 | bpf: gas,opcodes: fix pseudoc syntax for MOVS* and LDXS* insns | Jose E. Marchesi | 1 | -10/+10 |
2023-07-24 | bpf: add support for jal/gotol jump instruction with 32-bit target | Jose E. Marchesi | 1 | -0/+7 |
2023-07-21 | bpf: opcodes, gas: support for signed load V4 instructions | Jose E. Marchesi | 1 | -0/+20 |
2023-07-21 | bpf: opcodes, gas: support for signed register move V4 instructions | Jose E. Marchesi | 1 | -0/+24 |
2023-07-21 | DesCGENization of the BPF binutils port | Jose E. Marchesi | 1 | -293/+497 |
2023-06-30 | RISC-V: Add support for the Zfa extension | Christoph Müllner | 1 | -0/+41 |
2023-06-15 | GAS/doc: Correct Tag_GNU_MIPS_ABI_MSA attribute description | Maciej W. Rozycki | 1 | -3/+4 |
2023-05-23 | Support Intel FRED LKGS | Zhang, Jun | 1 | -0/+3 |