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2024-05-24x86: simplify VexVVVV_SRC2 handling for the XOP caseJan Beulich1-9/+5
2024-05-24x86: simplify / consolidate check_{word,long,qword}_reg()Jan Beulich1-16/+4
2024-05-24x86: correct VCVT{,U}SI2SDJan Beulich1-5/+47
2024-05-22Support APX zero-upperCui, Lili1-2/+3
2024-05-22X86: Remove "i.rex" to eliminate extra conditional branchCui, Lili1-1/+1
2024-05-22Add check for 8-bit old registers in EVEX formatCui, Lili1-3/+4
2024-05-22x86: Split REX/REX2 old registers judgment.Cui, Lili1-16/+14
2024-05-21gas: drop remnants of ia64-*-aix*Jan Beulich1-23/+0
2024-05-20RISC-V: PR31733, Change initial CFI operation from DW_CFA_def_cfa_register to...Sung-hun Kim1-1/+1
2024-05-17LoongArch: gas: Adjust DWARF CIE alignment factorsmengqinggang1-5/+9
2024-05-16aarch64: fp8 convert and scale - add feature flags and related structuresVictor Do Nascimento1-0/+1
2024-05-16arm: remove incorrect handling of FP bignums in move_or_literal_poolRichard Earnshaw1-6/+24
2024-05-15aarch64: Add sysreg features to +d128 dependenciesAndrew Carlotti1-2/+5
2024-05-15aarch64: Add simd dependency to +sha2Andrew Carlotti1-1/+1
2024-05-14arm: remove Maverick support from the assembler.Richard Earnshaw1-179/+4
2024-05-06x86: Drop using extension_opcode to encode vvvv registerCui, Lili1-6/+3
2024-05-06x86: Drop SwapSourcesCui, Lili1-8/+11
2024-05-06x86: Use vexvvvv as the switch state to encode the vvvv registerCui, Lili1-15/+17
2024-05-03x86/APX: extend SSE2AVX coverageJan Beulich1-2/+7
2024-04-25bpf: fix calculation when deciding to relax branchDavid Faust1-4/+33
2024-04-25LoongArch: gas: Simplify relocations in sections without code flagJinyang He1-3/+1
2024-04-23arm: Fix MVE vmla encodingClaudio Bantaloukas1-2/+2
2024-04-22x86/APX: Add invalid check for APX EVEX.X4.Cui, Lili1-1/+4
2024-04-20LoongArch: Add -mignore-start-align optionmengqinggang1-20/+50
2024-04-16x86: Fix a memory leak in md_assembleH.J. Lu1-5/+8
2024-04-10x86-64: Use long NOPs for Intel Core processorsH.J. Lu1-5/+35
2024-04-09arm: Fix encoding of MVE vqshr[u]nAlex Coplan1-4/+4
2024-04-09RISC-V: Support Zcmp push/pop instructions.Jiawei1-0/+181
2024-04-07Support APX NFCui, Lili1-4/+31
2024-04-03x86/APX: Remove KEYLOCKER and SHA promotions from EVEX MAP4Cui, Lili1-7/+0
2024-04-01LoongArch: gas: Ignore .align if it is at the start of a sectionmengqinggang1-25/+109
2024-03-31BFD: Fix the bug of R_LARCH_AGLIN caused by discard sectionmengqinggang1-4/+1
2024-03-28x86/SSE2AVX: move checkingJan Beulich1-11/+10
2024-03-28x86/SSE2AVX: respect prefixesJan Beulich1-2/+3
2024-03-28RISC-V: Removed privileged spec 1.9.1 support in assembler.Nelson Chu1-2/+3
2024-03-22x86: fix Solaris testsuite failuresJan Beulich1-6/+3
2024-03-19gas, aarch64: Add faminmax extensionSaurabh Jha1-0/+1
2024-03-19LoongArch: Add relaxation for R_LARCH_CALL36mengqinggang1-1/+18
2024-03-18aarch64: Add support for (M)ADDPT and (M)SUBPT instructionsYury Khrustalev1-0/+47
2024-03-15x86/APX: legacy promoted insns can't access %xmm16-%xmm31Jan Beulich1-0/+7
2024-03-13RISC-V: Add -march=help for gasHau Hsu1-0/+6
2024-03-12LoongArch: Scan all illegal operand instructions without interruptionLulu Cai1-5/+6
2024-03-11x86: KeyLocker insn interaction with -msse-check / .sse_checkJan Beulich1-1/+2
2024-03-11x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128Jan Beulich1-1/+3
2024-03-11x86: don't open-code REG_{SP,FP}Jan Beulich1-2/+2
2024-03-08gas: Fix x86 build with GCC 6.4H.J. Lu1-1/+1
2024-03-06LoongArch: Delete extra instructions when TLS type transitionLulu Cai1-5/+26
2024-03-01s390: Be more verbose about missing operand typeJens Remus1-1/+37
2024-03-01s390: Provide operand number in assembler warning and error messagesJens Remus1-33/+74
2024-03-01s390: Allow to explicitly omit base register operand in assemblyJens Remus1-3/+7