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path: root/gas/config/tc-aarch64.c
AgeCommit message (Expand)AuthorFilesLines
5 daysaarch64: remove redundant register type R_NMatthieu Longo1-5/+1
5 daysaarch64: constify unchanged char* argumentsMatthieu Longo1-1/+1
2024-10-29gas: constify md_{short,long}opts and md_longopts_sizeJan Beulich1-3/+3
2024-08-12Revert "gas: have scrubber retain more whitespace"H.J. Lu1-12/+7
2024-08-09gas: have scrubber retain more whitespaceJan Beulich1-7/+12
2024-07-18gas: aarch64: add experimental support for SCFIIndu Bhagat1-0/+15
2024-07-12aarch64: Add support for sme2.1 movaz instructions.Srinath Parvathaneni1-0/+1
2024-07-12aarch64: disable feature b16b16Matthieu Longo1-1/+3
2024-07-08aarch64: Add support for sve2p1 pmov instruction.srinath1-3/+25
2024-07-05aarch64: fix build with old glibcJan Beulich1-3/+3
2024-07-04gas: Enhance arch-specific SFrame configuration descriptionsJens Remus1-3/+3
2024-06-28aarch64: Add support for Armv9.5-A architectureClaudio Bantaloukas1-0/+1
2024-06-25aarch64: Treat operand ADDR_SIMPLE as address with base registerJens Remus1-3/+3
2024-06-25aarch64: Fix sve2p1 ld[1-4]/st[1-4]q instruction operands.Srinath Parvathaneni1-3/+1
2024-06-25aarch64: Fix sve2p1 extq instruction operands.Srinath Parvathaneni1-1/+1
2024-06-24aarch64: Add SME FP8 multiplication instructionsAndrew Carlotti1-0/+11
2024-06-24aarch64: Add FP8 Neon and SVE multiplication instructionsAndrew Carlotti1-2/+24
2024-06-24aarch64: Add support for virtual featuresAndrew Carlotti1-19/+45
2024-06-24aarch64: Move struct definition towards its usageAndrew Carlotti1-8/+8
2024-06-24gas, aarch64: Add SME2 lutv2 extensionsaurabh.jha@arm.com1-4/+88
2024-06-12aarch64: add Branch Record Buffer extension instructionsClaudio Bantaloukas1-0/+8
2024-06-10aarch64: warn on unpredictable results for new rcpc3 instructionsMatthieu Longo1-1/+39
2024-05-28gas, aarch64: Add SVE2 lut extensionsaurabh.jha@arm.com1-0/+3
2024-05-28gas, aarch64: Add AdvSIMD lut extensionsaurabh.jha@arm.com1-0/+67
2024-05-16aarch64: fp8 convert and scale - add feature flags and related structuresVictor Do Nascimento1-0/+1
2024-05-15aarch64: Add sysreg features to +d128 dependenciesAndrew Carlotti1-2/+5
2024-05-15aarch64: Add simd dependency to +sha2Andrew Carlotti1-1/+1
2024-03-19gas, aarch64: Add faminmax extensionSaurabh Jha1-0/+1
2024-03-18aarch64: Add support for (M)ADDPT and (M)SUBPT instructionsYury Khrustalev1-0/+47
2024-02-27aarch64: rename internals related to PAuth feature to use pauth in their nami...Matthieu Longo1-2/+2
2024-01-15aarch64: rcpc3: New RCPC3_ADDR operand typesVictor Do Nascimento1-0/+65
2024-01-15aarch64: rcpc3: Add +rcpc3 architectural feature support flagVictor Do Nascimento1-0/+1
2024-01-15aarch64: Fix tlbi and tlbip instructionsAndrew Carlotti1-7/+11
2024-01-15aarch64: Refactor aarch64_sys_ins_reg_supported_pAndrew Carlotti1-3/+2
2024-01-15aarch64: Add SVE2.1 Contiguous load/store instructions.Srinath Parvathaneni1-0/+3
2024-01-15aarch64: Add SVE2.1 dupq, eorqv and extq instructions.Srinath Parvathaneni1-0/+2
2024-01-15aarch64: Add support for FEAT_SVE2p1.Srinath Parvathaneni1-0/+1
2024-01-15aarch64: Add support for FEAT_SME2p1 instructions.Srinath Parvathaneni1-0/+18
2024-01-15aarch64: Add support for FEAT_B16B16 instructions.Srinath Parvathaneni1-0/+1
2024-01-12aarch64: Add +xs flag for existing instructionsAndrew Carlotti1-0/+1
2024-01-12aarch64: Add +wfxt flag for existing instructionsAndrew Carlotti1-0/+1
2024-01-12aarch64: Add +rcpc2 flag for existing instructionsAndrew Carlotti1-0/+1
2024-01-12aarch64: Add +flagm2 flag for existing instructionsAndrew Carlotti1-0/+1
2024-01-12aarch64: Add +frintts flag for existing instructionsAndrew Carlotti1-0/+1
2024-01-12aarch64: Add +jscvt flag for existing fjcvtzs instructionAndrew Carlotti1-0/+1
2024-01-12aarch64: Fix option parsing to disallow prefixes of valid optionsAndrew Carlotti1-1/+3
2024-01-12aarch64: Add +fcma alias for +compnumAndrew Carlotti1-0/+2
2024-01-12aarch64: Fix +lse feature flag dependencyAndrew Carlotti1-1/+1
2024-01-09aarch64: Add support for 128-bit system register mrrs and msrr insnsVictor Do Nascimento1-4/+9
2024-01-09aarch64: Implement TLBIP 128-bit instructionVictor Do Nascimento1-0/+1
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