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AgeCommit message (Expand)AuthorFilesLines
2023-11-07aarch64: Add LSE128 instructionsVictor Do Nascimento1-0/+2
2023-11-02aarch64: Add support for GCS extension.srinath1-0/+2
2023-11-02aarch64: Add support for Check Feature Status Extension.Srinath Parvathaneni1-0/+2
2023-11-02aarch64: Add support for Armv8.9-A and Armv9.4-A Architectures.srinath1-0/+2
2023-10-31Support Intel USER_MSRHu, Lin11-0/+2
2023-10-05aarch64: Enable Cortex-X4 CPUSaurabh Jha1-0/+2
2023-09-25Revert "arc: Update NEWS files"Claudiu Zissulescu1-2/+0
2023-09-25arc: Update NEWS filesClaudiu Zissulescu1-0/+2
2023-09-14x86: support AVX10.1 vector size restrictionsJan Beulich1-0/+2
2023-08-16kvx: New port.Paul Iannetta1-0/+2
2023-08-16aarch64: Enable Cortex-A720 CPURichard Ball1-0/+2
2023-08-10aarch64: Enable Cortex-A520 CPURichard Ball1-0/+2
2023-08-02Revert "2.41 Release sources"Sam James1-0/+10
2023-08-022.41 Release sourcesbinutils-2_41-releaseNick Clifton1-10/+0
2023-07-27Support Intel PBNDKBHu, Lin11-0/+2
2023-07-27Support Intel SM4Haochen Jiang1-0/+2
2023-07-27Support Intel SM3Haochen Jiang1-0/+2
2023-07-27Support Intel SHA512Haochen Jiang1-0/+2
2023-07-27Support Intel AVX-VNNI-INT16konglin11-0/+2
2023-07-03Add markers for the 2.41 branchNick Clifton1-0/+2
2023-07-03gas: NEWS: Announce LoongArch changes in the 2.41 cycleWANG Xuerui1-0/+12
2023-05-23Support Intel FRED LKGSZhang, Jun1-0/+4
2023-05-23Revert "Support Intel FRED LKGS"liuhongt1-4/+0
2023-05-23Support Intel FRED LKGSZhang, Jun1-0/+4
2023-04-07Support Intel AMX-COMPLEXHaochen Jiang1-0/+2
2023-03-31x86: document .insnJan Beulich1-0/+2
2023-03-30aarch64: Add +sme2Richard Sandiford1-0/+2
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-12-31Add markers for 2.40 branchNick Clifton1-0/+2
2022-11-17RISC-V: Add T-Head Int vendor extensionChristoph Müllner1-1/+1
2022-11-17RISC-V: Add T-Head Fmv vendor extensionChristoph Müllner1-3/+3
2022-11-15gas/NEWS: add text about new command line option and SFrame supportIndu Bhagat1-0/+3
2022-11-14arm: Add support for Cortex-X1C CPU.Srinath Parvathaneni1-0/+2
2022-11-08Support Intel RAO-INTKong Lingling1-0/+2
2022-11-04Support Intel AVX-NE-CONVERTkonglin11-0/+2
2022-11-02Support Intel MSRLISTHu, Lin11-0/+2
2022-11-02Support Intel WRMSRNSHu, Lin11-0/+2
2022-11-02Support Intel CMPccXADDHaochen Jiang1-0/+2
2022-11-02Support Intel AVX-VNNI-INT8Cui,Lili1-0/+2
2022-11-02Support Intel AVX-IFMAHongyu Wang1-0/+2
2022-10-31Support Intel PREFETCHICui, Lili1-0/+2
2022-10-28gas: NEWS: Note support for RISC-V ZawrsPalmer Dabbelt1-0/+2
2022-10-28gas: NEWS: Add a missing newlinePalmer Dabbelt1-0/+1
2022-10-21Support Intel AMX-FP16Cui,Lili1-0/+2
2022-10-11add --enable-default-compressed-debug-sections-algorithm configure optionMartin Liska1-0/+3
2022-10-04gas: NEWS: Mention the T-Head extensions that were recently addedPalmer Dabbelt1-0/+5
2022-09-26binutils, gdb: support zstd compressed debug sectionsFangrui Song1-0/+3
2022-08-25gas: NEWS: Add the RISC-V features for 2.39Palmer Dabbelt1-0/+12
2022-08-25gas: NEWS: Add the RISC-V features for 2.38Palmer Dabbelt1-0/+11
2022-08-25gas: NEWS: Add the RISC-V features for 2.37Palmer Dabbelt1-0/+3