| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-12-20 | ubsan: or1k: left shift of negative value | Alan Modra | 1 | -2/+2 |
| 2019-06-13 | cpu/or1k: Document no branch delay slot architectures and l.adrp | Stafford Horne | 1 | -1/+1 |
| 2019-06-13 | cpu/or1k: Add support for orfp64a32 spec | Stafford Horne | 1 | -0/+1 |
| 2018-10-05 | or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns | Richard Henderson | 1 | -93/+168 |
| 2018-10-05 | or1k: Add the l.adrp insn and supporting relocations | Stafford Horne | 1 | -1/+34 |
| 2018-10-05 | or1k: Add relocations for high-signed and low-stores | Richard Henderson | 1 | -2/+2 |
| 2014-07-20 | or1k: add missing l.msync, l.psync and l.psync instructions. | Stefan Kristiansson | 1 | -0/+24 |
| 2014-05-08 | or1k: add support for l.swa/l.lwa atomic instructions | Stefan Kristiansson | 1 | -3/+44 |
| 2014-04-22 | Remove support for the (deprecated) openrisc and or32 configurations and replace | Christian Svensson | 1 | -0/+1080 |
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index : rocket-tools/riscv-gnu-toolchain/gdb.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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