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PR 21739
cpu/
* mep.opc (parse_lo16, parse_unsigned7): Mark %function
message as no-c-format.
opcodes/
* mep-asm.c: Regenerate.
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cpu/
* mep.opc: Whitespace and formatting.
opcodes/
* mep-asm.c: Regenerate.
* mep-dis.c: Regenerate.
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PR 30231
* mep.opc (mep_print_insn): Check for an out of range index.
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Note that opcodes is regenerated with cgen commit d1dd5fcc38e reverted,
due to failure of bpf to compile with that patch applied.
.../opcodes/bpf-opc.c:57:11: error: conversion from ‘long unsigned int’ to ‘unsigned int’ changes value from ‘18446744073709486335’ to ‘4294902015’ [-Werror=overflow]
57 | 64, 64, 0xffffffffffff00ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
plus other similar errors.
cpu/
* mep.opc (print_tpreg, print_spreg): Delete unnecessary
forward declarations. Replace PTR with void *.
* mt.opc (print_dollarhex, print_pcrel): Delete forward decls.
opcodes/
* bpf-desc.c, * bpf-dis.c, * cris-desc.c,
* epiphany-desc.c, * epiphany-dis.c,
* fr30-desc.c, * fr30-dis.c, * frv-desc.c, * frv-dis.c,
* ip2k-desc.c, * ip2k-dis.c, * iq2000-desc.c, * iq2000-dis.c,
* lm32-desc.c, * lm32-dis.c, * m32c-desc.c, * m32c-dis.c,
* m32r-desc.c, * m32r-dis.c, * mep-desc.c, * mep-dis.c,
* mt-desc.c, * mt-dis.c, * or1k-desc.c, * or1k-dis.c,
* xc16x-desc.c, * xc16x-dis.c,
* xstormy16-desc.c, * xstormy16-dis.c: Regenerate.
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Currently, the get_disassembler() implementations for riscv, csky, and
rl78--and mep_print_insn() for mep--access ELF variants of union fields
without first checking that the bfd actually represents an ELF. This
causes undefined behavior and crashes when disassembling non-ELF files
(the "binary" BFD, for example). Fix that.
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Commit f375d32b35ce changed a generated file. Edit the source instead.
* mep.opc (macros): Make static and const.
(lookup_macro): Return and use const pointer.
(expand_macro): Make mac param const.
(expand_string): Make pmacro const.
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The CGEN support code in opcodes accesses instruction contents using a
couple of functions defined in cgen-opc.c: cgen_get_insn_value and
cgen_put_insn_value. These functions use the "instruction endianness"
in the CPU description to order the read/written bytes.
The process of writing an instruction to the object file is:
a) cgen_put_insn_value ;; Writes out the opcodes.
b) ARCH_cgen_insert_operand
insert_normal
insert_1
cgen_put_insn_value ;; Writes out the bytes of the
;; operand.
Likewise, the process of reading an instruction from the object file
is:
a) cgen_get_insn_value ;; Reads the opcodes.
b) ARCH_cgen_extract_operand
extract_normal
extract_1
cgen_get_insn_value ;; Reads in the bytes of the
;; operand.
As can be seen above, cgen_{get,put}_insn_value are used to both
process the instruction opcodes (the constant fields conforming the
base instruction) and also the values of the instruction operands,
such as immediates.
This is problematic for architectures in which the endianness of
instructions is different to the endianness of data. An example is
BPF, where instructions are always encoded big-endian but the data may
be either big or little.
This patch changes the cgen_{get,put}_insn_value functions in order to
get an extra argument with the endianness to use, and adapts the
existin callers to these functions in order to provide cd->endian or
cd->insn_endian, whatever appropriate. Callers like extract_1 and
insert_1 pass cd->endian (since they are reading/writing operand
values) while callers reading/writing the base instruction pass
cd->insn_endian instead.
A few little adjustments have been needed in some existing CGEN based
ports:
* The BPF assembler uses cgen_put_insn_value. It has been adapted to
pass the new endian argument.
* The mep port has code in mep.opc that uses cgen_{get,put}_insn_value.
It has been adapted to pass the new endianargument. Ditto for a
call in the assembler.
Tested with --enable-targets=all.
Regested in all supported targets.
No regressions.
include/ChangeLog:
2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/cgen.h: Get an `endian' argument in both
cgen_get_insn_value and cgen_put_insn_value.
opcodes/ChangeLog:
2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
(cgen_put_insn_value): Likewise.
(cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
* cgen-dis.in (print_insn): Likewise.
* cgen-ibld.in (insert_1): Likewise.
(insert_1): Likewise.
(insert_insn_normal): Likewise.
(extract_1): Likewise.
* bpf-dis.c: Regenerate.
* bpf-ibld.c: Likewise.
* bpf-ibld.c: Likewise.
* cgen-dis.in: Likewise.
* cgen-ibld.in: Likewise.
* cgen-opc.c: Likewise.
* epiphany-dis.c: Likewise.
* epiphany-ibld.c: Likewise.
* fr30-dis.c: Likewise.
* fr30-ibld.c: Likewise.
* frv-dis.c: Likewise.
* frv-ibld.c: Likewise.
* ip2k-dis.c: Likewise.
* ip2k-ibld.c: Likewise.
* iq2000-dis.c: Likewise.
* iq2000-ibld.c: Likewise.
* lm32-dis.c: Likewise.
* lm32-ibld.c: Likewise.
* m32c-dis.c: Likewise.
* m32c-ibld.c: Likewise.
* m32r-dis.c: Likewise.
* m32r-ibld.c: Likewise.
* mep-dis.c: Likewise.
* mep-ibld.c: Likewise.
* mt-dis.c: Likewise.
* mt-ibld.c: Likewise.
* or1k-dis.c: Likewise.
* or1k-ibld.c: Likewise.
* xc16x-dis.c: Likewise.
* xc16x-ibld.c: Likewise.
* xstormy16-dis.c: Likewise.
* xstormy16-ibld.c: Likewise.
gas/ChangeLog:
2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* cgen.c (gas_cgen_finish_insn): Pass the endianness to
cgen_put_insn_value.
(gas_cgen_md_apply_fix): Likewise.
(gas_cgen_md_apply_fix): Likewise.
* config/tc-bpf.c (md_apply_fix): Pass data endianness to
cgen_put_insn_value.
* config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to
cgen_put_insn_value.
cpu/ChangeLog:
2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
* mep.opc (print_slot_insn): Pass the insn endianness to
cgen_get_insn_value.
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cpu/
* mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
"if (x) free (x)" with "free (x)".
opcodes/
* arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
* sparc-dis.c: Likewise.
* tic4x-dis.c: Likewise.
* xtensa-dis.c: Likewise.
* bpf-desc.c: Regenerate.
* epiphany-desc.c: Regenerate.
* fr30-desc.c: Regenerate.
* frv-desc.c: Regenerate.
* ip2k-desc.c: Regenerate.
* iq2000-desc.c: Regenerate.
* lm32-desc.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32r-desc.c: Regenerate.
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mt-desc.c: Regenerate.
* or1k-desc.c: Regenerate.
* xc16x-desc.c: Regenerate.
* xstormy16-desc.c: Regenerate.
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I edited opcodes/mep-asm.c in 1a0670f3 without noticing it was a
generated file.
* mep.opc (expand_string): Add fall through comment.
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