| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2023-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2022-12-17 | bfd_get_relocated_section_contents allow NULL data buffer | Alan Modra | 1 | -1/+4 |
| 2022-11-14 | objcopy renaming section with explicit flags | Alan Modra | 1 | -0/+4 |
| 2022-08-25 | PR11290, avr-ld "out of range error" is confusing | Alan Modra | 1 | -1/+1 |
| 2022-07-25 | bfd: Delete R_LARCH_NONE from dyn info of LoongArch. | liuzhensong | 1 | -0/+3 |
| 2022-07-25 | bfd: Add supported for LoongArch new relocations. | liuzhensong | 1 | -0/+79 |
| 2022-06-27 | drop XC16x bits | Jan Beulich | 1 | -11/+0 |
| 2022-06-14 | BFD_RELOC_MIPS_16 | Alan Modra | 1 | -1/+1 |
| 2022-06-08 | Don't encode reloc.size | Alan Modra | 1 | -50/+27 |
| 2022-06-08 | HOWTO size encoding | Alan Modra | 1 | -4/+4 |
| 2022-06-08 | HOWTO_RSIZE | Alan Modra | 1 | -1/+2 |
| 2022-06-08 | NONE reloc fixes | Alan Modra | 1 | -1/+1 |
| 2022-04-07 | Add support for COFF secidx relocations | Mark Harmstone | 1 | -0/+2 |
| 2022-01-02 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2021-11-15 | PowerPC64 @notoc in non-power10 code | Alan Modra | 1 | -0/+2 |
| 2021-10-24 | LoongArch bfd support | liuzhensong | 1 | -0/+89 |
| 2021-08-06 | bfd_reloc_offset_in_range overflow | Alan Modra | 1 | -1/+1 |
| 2021-05-06 | or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha() | Stafford Horne | 1 | -0/+2 |
| 2021-04-20 | Rework the R_NEG support on both gas and ld for the PowerPC AIX targets, in o... | Cl?ment Chigot | 1 | -0/+2 |
| 2021-03-31 | Use bool in bfd | Alan Modra | 1 | -29/+29 |
| 2021-03-12 | aix: implement TLS relocation for gas and ld | Clément Chigot | 1 | -0/+20 |
| 2021-03-12 | aix: implement R_TOCU and R_TOCL relocations | Clément Chigot | 1 | -0/+4 |
| 2021-03-05 | Move x86_64 PE changes out of bfd_perform_relocation | Alan Modra | 1 | -25/+1 |
| 2021-03-03 | Split relocation defines out of coff/internal.h | Alan Modra | 1 | -1/+1 |
| 2021-01-12 | elf/x86-64: Adjust R_AMD64_DIR64/R_AMD64_DIR32 for PE/x86-64 inputs | H.J. Lu | 1 | -0/+7 |
| 2021-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2020-09-16 | elf/x86-64: Adjust relocation for PE/x86-64 inputs | H.J. Lu | 1 | -0/+18 |
| 2020-09-08 | MSP430: Support relocations for subtract expressions in .uleb128 directives | Jozef Lawrynowicz | 1 | -0/+5 |
| 2020-09-01 | arm: ubsan: shift exponent 4G | Alan Modra | 1 | -2/+3 |
| 2020-08-27 | PR26462 UBSAN: reloc.c:473 shift exponent 4294967295 | Alan Modra | 1 | -0/+3 |
| 2020-06-06 | Rename PowerPC64 pcrel GOT TLS relocations | Alan Modra | 1 | -4/+4 |
| 2020-04-22 | xtensa: fix PR ld/25861 | Max Filippov | 1 | -0/+24 |
| 2020-02-26 | Indent labels | Alan Modra | 1 | -1/+1 |
| 2020-02-07 | Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add ... | Sergey Belyashov | 1 | -0/+4 |
| 2020-01-02 | Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A... | Sergey Belyashov | 1 | -0/+24 |
| 2020-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
| 2019-11-25 | Pass section when available to bfd_octets_per_byte | Alan Modra | 1 | -16/+13 |
| 2019-11-25 | Introduce new section flag: SEC_ELF_OCTETS | Christian Eggers | 1 | -7/+25 |
| 2019-11-19 | PR25200, SIGSEGV in _bfd_elf_validate_reloc | Alan Modra | 1 | -22/+5 |
| 2019-11-07 | Remove CR16C support | Alan Modra | 1 | -82/+0 |
| 2019-09-19 | bfd_section_* macros | Alan Modra | 1 | -2/+1 |
| 2019-09-18 | Constify target name, reloc name, and carsym name | Alan Modra | 1 | -1/+1 |
| 2019-07-19 | [PowerPC64] pc-relative TLS relocations | Alan Modra | 1 | -0/+14 |
| 2019-05-24 | PowerPC relocations for prefix insns | Alan Modra | 1 | -0/+34 |
| 2019-05-23 | bfd: add support for eBPF | Jose E. Marchesi | 1 | -0/+13 |
| 2019-05-06 | PowerPC reloc symbols that shouldn't be adjusted | Alan Modra | 1 | -8/+8 |
| 2019-04-15 | [binutils, ARM, 16/16] Add support to VLDR and VSTR of system registers | Andre Vieira | 1 | -0/+2 |
| 2019-04-15 | [binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma... | Andre Vieira | 1 | -0/+5 |
| 2019-04-15 | [binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline | Andre Vieira | 1 | -0/+5 |
| 2019-04-15 | [binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_... | Andre Vieira | 1 | -0/+5 |
