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-rw-r--r--sim/testsuite/riscv/m-ext.s2
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/testsuite/riscv/m-ext.s b/sim/testsuite/riscv/m-ext.s
index b80bd14..4247156 100644
--- a/sim/testsuite/riscv/m-ext.s
+++ b/sim/testsuite/riscv/m-ext.s
@@ -1,5 +1,5 @@
# Check that the RV32M instructions run without any faults.
-# mach: riscv
+# mach: riscv32 riscv64
.include "testutils.inc"