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-rw-r--r--sim/m32r/cpu.h2
-rw-r--r--sim/m32r/cpu2.h2
-rw-r--r--sim/m32r/cpux.h2
-rw-r--r--sim/m32r/sim-if.c3
-rw-r--r--sim/m32r/sim-main.h15
5 files changed, 10 insertions, 14 deletions
diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h
index 71a375f..9079b74 100644
--- a/sim/m32r/cpu.h
+++ b/sim/m32r/cpu.h
@@ -87,7 +87,7 @@ m32rbf_h_psw_set_handler (current_cpu, (x));\
#define GET_H_LOCK() CPU (h_lock)
#define SET_H_LOCK(x) (CPU (h_lock) = (x))
} hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& M32R_SIM_CPU (cpu)->cpu_data.hardware)
} M32RBF_CPU_DATA;
/* Cover fns for register access. */
diff --git a/sim/m32r/cpu2.h b/sim/m32r/cpu2.h
index bd98a98..5dc4d64 100644
--- a/sim/m32r/cpu2.h
+++ b/sim/m32r/cpu2.h
@@ -94,7 +94,7 @@ m32r2f_h_psw_set_handler (current_cpu, (x));\
#define GET_H_LOCK() CPU (h_lock)
#define SET_H_LOCK(x) (CPU (h_lock) = (x))
} hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& M32R_SIM_CPU (cpu)->cpu_data.hardware)
} M32R2F_CPU_DATA;
/* Cover fns for register access. */
diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h
index 1e6d84f..f2496b0 100644
--- a/sim/m32r/cpux.h
+++ b/sim/m32r/cpux.h
@@ -94,7 +94,7 @@ m32rxf_h_psw_set_handler (current_cpu, (x));\
#define GET_H_LOCK() CPU (h_lock)
#define SET_H_LOCK(x) (CPU (h_lock) = (x))
} hardware;
-#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
+#define CPU_CGEN_HW(cpu) (& M32R_SIM_CPU (cpu)->cpu_data.hardware)
} M32RXF_CPU_DATA;
/* Cover fns for register access. */
diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c
index 878a0d5..401d102 100644
--- a/sim/m32r/sim-if.c
+++ b/sim/m32r/sim-if.c
@@ -66,7 +66,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
current_target_byte_order = BFD_ENDIAN_BIG;
/* The cpu data is kept in a separately allocated chunk of memory. */
- if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
+ if (sim_cpu_alloc_all_extra (sd, 1, sizeof (struct m32r_sim_cpu))
+ != SIM_RC_OK)
{
free_state (sd);
return 0;
diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h
index 2ce989a..fcde7fe 100644
--- a/sim/m32r/sim-main.h
+++ b/sim/m32r/sim-main.h
@@ -3,6 +3,8 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
+#define SIM_HAVE_COMMON_SIM_CPU
+
/* This is a global setting. Different cpu families can't mix-n-match -scache
and -pbb. However some cpu families may use -simple while others use
one of -scache/-pbb. */
@@ -19,17 +21,9 @@
#include "m32r-sim.h"
#include "opcode/cgen.h"
-/* The _sim_cpu struct. */
-
-struct _sim_cpu {
- /* sim/common cpu base. */
- sim_cpu_base base;
-
- /* Static parts of cgen. */
- CGEN_CPU cgen_cpu;
-
+struct m32r_sim_cpu {
M32R_MISC_PROFILE m32r_misc_profile;
-#define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
+#define CPU_M32R_MISC_PROFILE(cpu) (& M32R_SIM_CPU (cpu)->m32r_misc_profile)
/* CPU specific parts go here.
Note that in files that don't need to access these pieces WANT_CPU_FOO
@@ -47,6 +41,7 @@ struct _sim_cpu {
M32R2F_CPU_DATA cpu_data;
#endif
};
+#define M32R_SIM_CPU(cpu) ((struct m32r_sim_cpu *) CPU_ARCH_DATA (cpu))
/* Misc. */