diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 13 | ||||
| -rw-r--r-- | opcodes/m32r-dis.c | 7 | ||||
| -rw-r--r-- | opcodes/sh-opc.h | 2 |
3 files changed, 18 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b1937de..683e786 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,16 @@ +2004-02-13 Ben Elliston <bje@wasabisystems.com> + + * m32r-dis.c: Regenerate. + +2004-01-27 Michael Snyder <msnyder@redhat.com> + + * sh-opc.h (sh_table): "fsrra", not "fssra". + +2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au> + + * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten + contraints. + 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au> * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args. diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c index 6e5ea70..4622462 100644 --- a/opcodes/m32r-dis.c +++ b/opcodes/m32r-dis.c @@ -105,7 +105,8 @@ my_print_insn (cd, pc, info) /* Read the base part of the insn. */ - status = (*info->read_memory_func) (pc, buf, buflen, info); + status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0), + buf, buflen, info); if (status != 0) { (*info->memory_error_func) (status, pc, info); @@ -118,13 +119,13 @@ my_print_insn (cd, pc, info) return print_insn (cd, pc, info, buf, buflen); /* Print the first insn. */ - buf += (big_p ? 0 : 2); if ((pc & 3) == 0) { + buf += (big_p ? 0 : 2); if (print_insn (cd, pc, info, buf, 2) == 0) (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); + buf += (big_p ? 2 : -2); } - buf += (big_p ? 2 : -2); x = (big_p ? &buf[0] : &buf[1]); if (*x & 0x80) diff --git a/opcodes/sh-opc.h b/opcodes/sh-opc.h index b9e103c..4b0b0a8 100644 --- a/opcodes/sh-opc.h +++ b/opcodes/sh-opc.h @@ -935,7 +935,7 @@ const sh_opcode_info sh_table[] = /* 1111nnnn01101101 fsqrt <F_REG_N> */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh3e_up}, /* 1111nnnn01101101 fsqrt <D_REG_N> */{"fsqrt",{D_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh4_up}, -/* 1111nnnn01111101 fssra <F_REG_N> */{"fssra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4a_up}, +/* 1111nnnn01111101 fsrra <F_REG_N> */{"fsrra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4a_up}, /* 1111nnnn00001101 fsts FPUL,<F_REG_N>*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}, arch_sh2e_up}, |