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-rw-r--r--include/ChangeLog5
-rw-r--r--include/elf/ppc64.h2
-rw-r--r--include/opcode/ppc.h4
3 files changed, 8 insertions, 3 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 1d322e9..7362955 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2020-05-11 Alan Modra <amodra@gmail.com>
+
+ * elf/ppc64.h: Update comment.
+ * opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
+
2020-04-30 Alex Coplan <alex.coplan@arm.com>
* opcode/aarch64.h (enum aarch64_opnd): Add
diff --git a/include/elf/ppc64.h b/include/elf/ppc64.h
index e2ad918..22991c8 100644
--- a/include/elf/ppc64.h
+++ b/include/elf/ppc64.h
@@ -158,7 +158,7 @@ START_RELOC_NUMBERS (elf_ppc64_reloc_type)
RELOC_NUMBER (R_PPC64_PLTSEQ, 119)
RELOC_NUMBER (R_PPC64_PLTCALL, 120)
-/* Powerxx support. */
+/* Power10 support. */
RELOC_NUMBER (R_PPC64_PLTSEQ_NOTOC, 121)
RELOC_NUMBER (R_PPC64_PLTCALL_NOTOC, 122)
RELOC_NUMBER (R_PPC64_PCREL_OPT, 123)
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 93c56a7..15331d1 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -228,8 +228,8 @@ extern const unsigned int spe2_num_opcodes;
/* Opcode is supported by EFS2. */
#define PPC_OPCODE_EFS2 0x200000000000ull
-/* Opcode is only supported by powerxx architecture. */
-#define PPC_OPCODE_POWERXX 0x400000000000ull
+/* Opcode is only supported by power10 architecture. */
+#define PPC_OPCODE_POWER10 0x400000000000ull
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)