diff options
Diffstat (limited to 'gas')
-rw-r--r-- | gas/NEWS | 2 | ||||
-rw-r--r-- | gas/config/tc-i386.c | 40 | ||||
-rw-r--r-- | gas/doc/c-i386.texi | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/i386.exp | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/user_msr-inval.l | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/user_msr-inval.s | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-user_msr-intel.d | 46 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-user_msr-inval.l | 9 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-user_msr-inval.s | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-user_msr.d | 46 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-user_msr.s | 42 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64.exp | 3 |
12 files changed, 208 insertions, 5 deletions
@@ -1,5 +1,7 @@ -*- text -*- +* Add support for Intel USER_MSR instructions. + * Add support for Intel AVX10.1. * Add support for Intel PBNDKB instructions. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 57ae6c5..c7b9a95 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1157,6 +1157,7 @@ static const arch_entry cpu_arch[] = VECARCH (sm4, SM4, ANY_SM4, reset), SUBARCH (pbndkb, PBNDKB, PBNDKB, false), VECARCH (avx10.1, AVX10_1, ANY_AVX512F, set), + SUBARCH (user_msr, USER_MSR, USER_MSR, false), }; #undef SUBARCH @@ -2474,7 +2475,8 @@ smallest_imm_type (offsetT num) t.bitfield.imm8 = 1; t.bitfield.imm8s = 1; t.bitfield.imm16 = 1; - t.bitfield.imm32 = 1; + if (flag_code != CODE_64BIT || fits_in_unsigned_long (num)) + t.bitfield.imm32 = 1; t.bitfield.imm32s = 1; } else if (fits_in_unsigned_byte (num)) @@ -2487,12 +2489,14 @@ smallest_imm_type (offsetT num) else if (fits_in_signed_word (num) || fits_in_unsigned_word (num)) { t.bitfield.imm16 = 1; - t.bitfield.imm32 = 1; + if (flag_code != CODE_64BIT || fits_in_unsigned_long (num)) + t.bitfield.imm32 = 1; t.bitfield.imm32s = 1; } else if (fits_in_signed_long (num)) { - t.bitfield.imm32 = 1; + if (flag_code != CODE_64BIT || fits_in_unsigned_long (num)) + t.bitfield.imm32 = 1; t.bitfield.imm32s = 1; } else if (fits_in_unsigned_long (num)) @@ -3833,6 +3837,7 @@ build_vex_prefix (const insn_template *t) case SPACE_0F: case SPACE_0F38: case SPACE_0F3A: + case SPACE_VEXMAP7: i.vex.bytes[0] = 0xc4; break; case SPACE_XOP08: @@ -5203,7 +5208,23 @@ md_assemble (char *line) swap_2_operands (0, 1); if (i.imm_operands) - optimize_imm (); + { + /* For USER_MSR instructions, imm32 stands for the name of an model specific + register (MSR). That's an unsigned quantity, whereas all other insns with + 32-bit immediate and 64-bit operand size use sign-extended + immediates (imm32s). Therefore these insns are special-cased, bypassing + the normal handling of immediates here. */ + if (is_cpu(current_templates->start, CpuUSER_MSR)) + { + for (j = 0; j < i.operands; j++) + { + if (operand_type_check(i.types[j], imm)) + i.types[j] = smallest_imm_type (i.op[j].imms->X_add_number); + } + } + else + optimize_imm (); + } if (i.disp_operands && !optimize_disp (t)) return; @@ -7536,6 +7557,17 @@ match_template (char mnem_suffix) break; } + /* This pattern aims to put the unusually placed imm operand to a usual + place. The constraints are currently only adapted to uwrmsr, and may + need further tweaking when new similar instructions become available. */ + if (i.imm_operands && i.imm_operands < i.operands + && operand_type_check (operand_types[i.operands - 1], imm)) + { + i.tm.operand_types[0] = operand_types[i.operands - 1]; + i.tm.operand_types[i.operands - 1] = operand_types[0]; + swap_2_operands(0, i.operands - 1); + } + return t; } diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index b04e1b0..03ee980 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -216,6 +216,7 @@ accept various extension mnemonics. For example, @code{avx10.1/512}, @code{avx10.1/256}, @code{avx10.1/128}, +@code{user_msr}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1650,7 +1651,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} @item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4} -@item @samp{.pbndkb} +@item @samp{.pbndkb} @tab @samp{.user_msr} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 1d9e297..6ab1970 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -510,6 +510,7 @@ if [gas_32_check] then { run_dump_test "sm4" run_dump_test "sm4-intel" run_list_test "pbndkb-inval" + run_list_test "user_msr-inval" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/user_msr-inval.l b/gas/testsuite/gas/i386/user_msr-inval.l new file mode 100644 index 0000000..54c48f1 --- /dev/null +++ b/gas/testsuite/gas/i386/user_msr-inval.l @@ -0,0 +1,3 @@ +.* Assembler messages: +.*:5: Error: `urdmsr' is only supported in 64-bit mode +.*:6: Error: `uwrmsr' is only supported in 64-bit mode diff --git a/gas/testsuite/gas/i386/user_msr-inval.s b/gas/testsuite/gas/i386/user_msr-inval.s new file mode 100644 index 0000000..1682a1e --- /dev/null +++ b/gas/testsuite/gas/i386/user_msr-inval.s @@ -0,0 +1,6 @@ +# Check Illegal 32bit USER_MSR instructions + + .text +_start: + urdmsr %r12, %r14 + uwrmsr %r12, %r14 diff --git a/gas/testsuite/gas/i386/x86-64-user_msr-intel.d b/gas/testsuite/gas/i386/x86-64-user_msr-intel.d new file mode 100644 index 0000000..e68b5ea --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-user_msr-intel.d @@ -0,0 +1,46 @@ +#as: +#objdump: -dw -Mintel +#name: x86_64 USER_MSR insns (Intel disassembly) +#source: x86-64-user_msr.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr r12,r14 +\s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr rax,r14 +\s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr r12,rdx +\s*[a-f0-9]+:\s*f2 0f 38 f8 d0\s+urdmsr rax,rdx +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 0f 0f 12 03\s+urdmsr r12,0x3120f0f +\s*[a-f0-9]+:\s*c4 e7 7b f8 c0 0f 0f 12 03\s+urdmsr rax,0x3120f0f +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 7f 00 00 00\s+urdmsr r12,0x7f +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 ff 7f 00 00\s+urdmsr r12,0x7fff +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 00 00 00 80\s+urdmsr r12,0x80000000 +\s*[a-f0-9]+:\s*f3 45 0f 38 f8 f4\s+uwrmsr r14,r12 +\s*[a-f0-9]+:\s*f3 44 0f 38 f8 f0\s+uwrmsr r14,rax +\s*[a-f0-9]+:\s*f3 41 0f 38 f8 d4\s+uwrmsr rdx,r12 +\s*[a-f0-9]+:\s*f3 0f 38 f8 d0\s+uwrmsr rdx,rax +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 0f 0f 12 03\s+uwrmsr 0x3120f0f,r12 +\s*[a-f0-9]+:\s*c4 e7 7a f8 c0 0f 0f 12 03\s+uwrmsr 0x3120f0f,rax +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr 0x7f,r12 +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr 0x7fff,r12 +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr 0x80000000,r12 +\s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr r12,r14 +\s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr rax,r14 +\s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr r12,rdx +\s*[a-f0-9]+:\s*f2 0f 38 f8 d0\s+urdmsr rax,rdx +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 0f 0f 12 03\s+urdmsr r12,0x3120f0f +\s*[a-f0-9]+:\s*c4 e7 7b f8 c0 0f 0f 12 03\s+urdmsr rax,0x3120f0f +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 7f 00 00 00\s+urdmsr r12,0x7f +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 ff 7f 00 00\s+urdmsr r12,0x7fff +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 00 00 00 80\s+urdmsr r12,0x80000000 +\s*[a-f0-9]+:\s*f3 45 0f 38 f8 f4\s+uwrmsr r14,r12 +\s*[a-f0-9]+:\s*f3 44 0f 38 f8 f0\s+uwrmsr r14,rax +\s*[a-f0-9]+:\s*f3 41 0f 38 f8 d4\s+uwrmsr rdx,r12 +\s*[a-f0-9]+:\s*f3 0f 38 f8 d0\s+uwrmsr rdx,rax +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 0f 0f 12 03\s+uwrmsr 0x3120f0f,r12 +\s*[a-f0-9]+:\s*c4 e7 7a f8 c0 0f 0f 12 03\s+uwrmsr 0x3120f0f,rax +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr 0x7f,r12 +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr 0x7fff,r12 +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr 0x80000000,r12 diff --git a/gas/testsuite/gas/i386/x86-64-user_msr-inval.l b/gas/testsuite/gas/i386/x86-64-user_msr-inval.l new file mode 100644 index 0000000..9eb3044 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-user_msr-inval.l @@ -0,0 +1,9 @@ +.* Assembler messages: +.*:5: Error: operand type mismatch for `urdmsr' +.*:6: Error: operand type mismatch for `urdmsr' +.*:7: Error: operand type mismatch for `urdmsr' +.*:8: Error: operand type mismatch for `urdmsr' +.*:9: Error: operand type mismatch for `uwrmsr' +.*:10: Error: operand type mismatch for `uwrmsr' +.*:11: Error: operand type mismatch for `uwrmsr' +.*:12: Error: operand type mismatch for `uwrmsr' diff --git a/gas/testsuite/gas/i386/x86-64-user_msr-inval.s b/gas/testsuite/gas/i386/x86-64-user_msr-inval.s new file mode 100644 index 0000000..e7b6d6e --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-user_msr-inval.s @@ -0,0 +1,12 @@ +# Check Illegal 64bit USER_MSR instructions + + .text +_start: + urdmsr $-1, %r14 + urdmsr $-32767, %r14 + urdmsr $-2147483648, %r14 + urdmsr $0x7fffffffffffffff, %r14 + uwrmsr %r12, $-1 + uwrmsr %r12, $-32767 + uwrmsr %r12, $-2147483648 + uwrmsr %r12, $0x7fffffffffffffff diff --git a/gas/testsuite/gas/i386/x86-64-user_msr.d b/gas/testsuite/gas/i386/x86-64-user_msr.d new file mode 100644 index 0000000..41f2971 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-user_msr.d @@ -0,0 +1,46 @@ +#as: +#objdump: -dw +#name: x86_64 USER_MSR insns +#source: x86-64-user_msr.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr %r14,%r12 +\s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr %r14,%rax +\s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr %rdx,%r12 +\s*[a-f0-9]+:\s*f2 0f 38 f8 d0\s+urdmsr %rdx,%rax +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 0f 0f 12 03\s+urdmsr \$0x3120f0f,%r12 +\s*[a-f0-9]+:\s*c4 e7 7b f8 c0 0f 0f 12 03\s+urdmsr \$0x3120f0f,%rax +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 7f 00 00 00\s+urdmsr \$0x7f,%r12 +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 ff 7f 00 00\s+urdmsr \$0x7fff,%r12 +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 00 00 00 80\s+urdmsr \$0x80000000,%r12 +\s*[a-f0-9]+:\s*f3 45 0f 38 f8 f4\s+uwrmsr %r12,%r14 +\s*[a-f0-9]+:\s*f3 44 0f 38 f8 f0\s+uwrmsr %rax,%r14 +\s*[a-f0-9]+:\s*f3 41 0f 38 f8 d4\s+uwrmsr %r12,%rdx +\s*[a-f0-9]+:\s*f3 0f 38 f8 d0\s+uwrmsr %rax,%rdx +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 0f 0f 12 03\s+uwrmsr %r12,\$0x3120f0f +\s*[a-f0-9]+:\s*c4 e7 7a f8 c0 0f 0f 12 03\s+uwrmsr %rax,\$0x3120f0f +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr %r12,\$0x7f +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr %r12,\$0x7fff +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr %r12,\$0x80000000 +\s*[a-f0-9]+:\s*f2 45 0f 38 f8 f4\s+urdmsr %r14,%r12 +\s*[a-f0-9]+:\s*f2 44 0f 38 f8 f0\s+urdmsr %r14,%rax +\s*[a-f0-9]+:\s*f2 41 0f 38 f8 d4\s+urdmsr %rdx,%r12 +\s*[a-f0-9]+:\s*f2 0f 38 f8 d0\s+urdmsr %rdx,%rax +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 0f 0f 12 03\s+urdmsr \$0x3120f0f,%r12 +\s*[a-f0-9]+:\s*c4 e7 7b f8 c0 0f 0f 12 03\s+urdmsr \$0x3120f0f,%rax +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 7f 00 00 00\s+urdmsr \$0x7f,%r12 +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 ff 7f 00 00\s+urdmsr \$0x7fff,%r12 +\s*[a-f0-9]+:\s*c4 c7 7b f8 c4 00 00 00 80\s+urdmsr \$0x80000000,%r12 +\s*[a-f0-9]+:\s*f3 45 0f 38 f8 f4\s+uwrmsr %r12,%r14 +\s*[a-f0-9]+:\s*f3 44 0f 38 f8 f0\s+uwrmsr %rax,%r14 +\s*[a-f0-9]+:\s*f3 41 0f 38 f8 d4\s+uwrmsr %r12,%rdx +\s*[a-f0-9]+:\s*f3 0f 38 f8 d0\s+uwrmsr %rax,%rdx +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 0f 0f 12 03\s+uwrmsr %r12,\$0x3120f0f +\s*[a-f0-9]+:\s*c4 e7 7a f8 c0 0f 0f 12 03\s+uwrmsr %rax,\$0x3120f0f +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 7f 00 00 00\s+uwrmsr %r12,\$0x7f +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 ff 7f 00 00\s+uwrmsr %r12,\$0x7fff +\s*[a-f0-9]+:\s*c4 c7 7a f8 c4 00 00 00 80\s+uwrmsr %r12,\$0x80000000 diff --git a/gas/testsuite/gas/i386/x86-64-user_msr.s b/gas/testsuite/gas/i386/x86-64-user_msr.s new file mode 100644 index 0000000..63bc6c1 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-user_msr.s @@ -0,0 +1,42 @@ +# Check 64bit USER_MSR instructions + + .text +_start: + urdmsr %r14, %r12 + urdmsr %r14, %rax + urdmsr %rdx, %r12 + urdmsr %rdx, %rax + urdmsr $51515151, %r12 + urdmsr $51515151, %rax + urdmsr $0x7f, %r12 + urdmsr $0x7fff, %r12 + urdmsr $0x80000000, %r12 + uwrmsr %r12, %r14 + uwrmsr %rax, %r14 + uwrmsr %r12, %rdx + uwrmsr %rax, %rdx + uwrmsr %r12, $51515151 + uwrmsr %rax, $51515151 + uwrmsr %r12, $0x7f + uwrmsr %r12, $0x7fff + uwrmsr %r12, $0x80000000 + + .intel_syntax noprefix + urdmsr r12, r14 + urdmsr rax, r14 + urdmsr r12, rdx + urdmsr rax, rdx + urdmsr r12, 51515151 + urdmsr rax, 51515151 + urdmsr r12, 0x7f + urdmsr r12, 0x7fff + urdmsr r12, 0x80000000 + uwrmsr r14, r12 + uwrmsr r14, rax + uwrmsr rdx, r12 + uwrmsr rdx, rax + uwrmsr 51515151, r12 + uwrmsr 51515151, rax + uwrmsr 0x7f, r12 + uwrmsr 0x7fff, r12 + uwrmsr 0x80000000, r12 diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index 29909a8..a7f5547 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -453,6 +453,9 @@ run_dump_test "x86-64-sm4" run_dump_test "x86-64-sm4-intel" run_dump_test "x86-64-pbndkb" run_dump_test "x86-64-pbndkb-intel" +run_dump_test "x86-64-user_msr" +run_dump_test "x86-64-user_msr-intel" +run_list_test "x86-64-user_msr-inval" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" |