diff options
| -rw-r--r-- | sim/mips/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/mips/mips3264r2.igen | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 9914daf..c1a1677 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,7 @@ +2007-05-15 Thiemo Seufer <ths@mips.com> + + * mips3264r2.igen (DSHD): Fix compile warning. + 2007-05-14 Thiemo Seufer <ths@mips.com> * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, diff --git a/sim/mips/mips3264r2.igen b/sim/mips/mips3264r2.igen index e0d1326..bfd2980 100644 --- a/sim/mips/mips3264r2.igen +++ b/sim/mips/mips3264r2.igen @@ -126,8 +126,8 @@ d = GPR[RT]; GPR[RD] = ((d >> 48) | (d << 48) - | ((d & 0x0000ffff00000000) >> 16) - | ((d & 0x00000000ffff0000) << 16)); + | ((d & 0x0000ffff00000000ULL) >> 16) + | ((d & 0x00000000ffff0000ULL) << 16)); TRACE_ALU_RESULT1 (GPR[RD]); } |