diff options
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/rfe.d | 9 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/rfe.s | 8 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/mips-opc.c | 5 |
6 files changed, 34 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 89a1acd..b4b6387 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * testsuite/gas/mips/rfe.d: New test. + * testsuite/gas/mips/rfe.s: New test source. + * testsuite/gas/mips/mips.exp: Run the new test. + +2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * testsuite/gas/mips/cp1-names-r3900.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. * testsuite/gas/mips/branch-misc-3.d: Update disassembly diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index aebfe3d..65a74dd 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1338,6 +1338,9 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test_arches "cp0m" [mips_arch_list_matching mips1 \ !mips2 !micromips] + run_dump_test_arches "rfe" [mips_arch_list_matching mips1 \ + !mips3 !mips32 !micromips] + run_dump_test "cp1-names-numeric" run_dump_test "cp1-names-r3000" run_dump_test "cp1-names-r3900" diff --git a/gas/testsuite/gas/mips/rfe.d b/gas/testsuite/gas/mips/rfe.d new file mode 100644 index 0000000..c086e9d --- /dev/null +++ b/gas/testsuite/gas/mips/rfe.d @@ -0,0 +1,9 @@ +#objdump: -d --prefix-addresses --show-raw-insn +#name: MIPS RFE instruction +#as: -32 + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 42000010 rfe + \.\.\. diff --git a/gas/testsuite/gas/mips/rfe.s b/gas/testsuite/gas/mips/rfe.s new file mode 100644 index 0000000..9094a57 --- /dev/null +++ b/gas/testsuite/gas/mips/rfe.s @@ -0,0 +1,8 @@ + .text + .set noreorder +foo: + rfe + +# Force some (non-delay-slot) zero bytes, to make 'objdump' print ... + .align 4, 0 + .space 16 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 795391d..2e93d56 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * mips-opc.c (mips_builtin_opcodes): Move the "rfe" entry ahead + of "c0". + +2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * mips-dis.c (mips_cp1_names_mips): New variable. (mips_arch_choices): Use it rather than `mips_cp1_names_numeric' for "r3000", "r4000", "r4010", "vr4100", "vr4111", "vr4120", diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 812fcc6..210d014 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -3399,6 +3399,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"ginvi", "s", 0x7c00003d, 0xfc1fffff, RD_1, 0, 0, GINV, 0 }, {"ginvt", "s,+\\", 0x7c0000bd, 0xfc1ffcff, RD_1, 0, 0, GINV, 0 }, +/* RFE conflicts with the new Virt spec instruction tlbgp. */ +{"rfe", "", 0x42000010, 0xffffffff, 0, 0, I1|T3, 0, 0 }, + /* No hazard protection on coprocessor instructions--they shouldn't change the state of the processor and if they do it's up to the user to put in nops as necessary. These are at the end so that the @@ -3411,8 +3414,6 @@ const struct mips_opcode mips_builtin_opcodes[] = {"cop1", "C", 0, (int) M_COP1, INSN_MACRO, INSN2_M_FP_S, I1, 0, 0 }, {"cop2", "C", 0, (int) M_COP2, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 }, {"cop3", "C", 0, (int) M_COP3, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2 }, -/* RFE conflicts with the new Virt spec instruction tlbgp. */ -{"rfe", "", 0x42000010, 0xffffffff, 0, 0, I1|T3, 0, 0 }, }; #define MIPS_NUM_OPCODES \ |