diff options
| -rw-r--r-- | ld/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 2061199e..27f44c2 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2011-12-10 David Daney <david.daney@cavium.com> + + * ld-mips-elf/pic-and-nonpic-6-n64.dd: Use correct encoding for + 64-bit MOVE instruction. + 2011-12-09 David Daney <david.daney@cavium.com> * ld-mips-elf/tls-multi-got-1.r: Add "0x" to match value for diff --git a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd index 7efa5d1..47c05bf 100644 --- a/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd +++ b/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd @@ -19,7 +19,7 @@ Disassembly of section \.plt: .*: ddd91000 ld t9,4096\(t2\) .*: 25ce1000 addiu t2,t2,4096 .*: 030ec023 subu t8,t8,t2 -.*: 03e07821 move t3,ra +.*: 03e0782d move t3,ra .*: 0018c0c2 srl t8,t8,0x3 .*: 0320f809 jalr t9 .*: 2718fffe addiu t8,t8,-2 |