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-rw-r--r--bfd/ChangeLog7
-rw-r--r--bfd/elf32-ppc.c14
-rw-r--r--bfd/elf64-ppc.c6
-rw-r--r--gold/ChangeLog6
-rw-r--r--gold/powerpc.cc14
5 files changed, 33 insertions, 14 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index ac3f160..cf5c41b 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2017-02-22 Alan Modra <amodra@gmail.com>
+
+ * elf64-ppc.c (ppc64_elf_finish_dynamic_sections): Don't segfault
+ on .got or .plt output section being discarded by script.
+ * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Likewise. Move
+ vxworks splt temp.
+
2017-02-21 Alan Modra <amodra@gmail.com>
* elf64-alpha.c (elf64_alpha_size_dynamic_sections): Only emit
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index 30998b1..d821935 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -10418,7 +10418,6 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
struct bfd_link_info *info)
{
asection *sdyn;
- asection *splt;
struct ppc_elf_link_hash_table *htab;
bfd_vma got;
bfd *dynobj;
@@ -10431,10 +10430,6 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
htab = ppc_elf_hash_table (info);
dynobj = htab->elf.dynobj;
sdyn = bfd_get_linker_section (dynobj, ".dynamic");
- if (htab->is_vxworks)
- splt = htab->elf.splt;
- else
- splt = NULL;
got = 0;
if (htab->elf.hgot != NULL)
@@ -10489,7 +10484,8 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
}
}
- if (htab->elf.sgot != NULL)
+ if (htab->elf.sgot != NULL
+ && htab->elf.sgot->output_section != bfd_abs_section_ptr)
{
if (htab->elf.hgot->root.u.def.section == htab->elf.sgot
|| htab->elf.hgot->root.u.def.section == htab->elf.sgotplt)
@@ -10531,8 +10527,12 @@ ppc_elf_finish_dynamic_sections (bfd *output_bfd,
}
/* Fill in the first entry in the VxWorks procedure linkage table. */
- if (splt && splt->size > 0)
+ if (htab->is_vxworks
+ && htab->elf.splt != NULL
+ && htab->elf.splt->size != 0
+ && htab->elf.splt->output_section != bfd_abs_section_ptr)
{
+ asection *splt = htab->elf.splt;
/* Use the right PLT. */
const bfd_vma *plt_entry = (bfd_link_pic (info)
? ppc_elf_vxworks_pic_plt0_entry
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 56b94f9..4d90e0a 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -15603,7 +15603,8 @@ ppc64_elf_finish_dynamic_sections (bfd *output_bfd,
}
}
- if (htab->elf.sgot != NULL && htab->elf.sgot->size != 0)
+ if (htab->elf.sgot != NULL && htab->elf.sgot->size != 0
+ && htab->elf.sgot->output_section != bfd_abs_section_ptr)
{
/* Fill in the first entry in the global offset table.
We use it to hold the link-time TOCbase. */
@@ -15615,7 +15616,8 @@ ppc64_elf_finish_dynamic_sections (bfd *output_bfd,
elf_section_data (htab->elf.sgot->output_section)->this_hdr.sh_entsize = 8;
}
- if (htab->elf.splt != NULL && htab->elf.splt->size != 0)
+ if (htab->elf.splt != NULL && htab->elf.splt->size != 0
+ && htab->elf.splt->output_section != bfd_abs_section_ptr)
{
/* Set .plt entry size. */
elf_section_data (htab->elf.splt->output_section)->this_hdr.sh_entsize
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 3f41834..4e1fb95 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,9 @@
+2017-02-22 Alan Modra <amodra@gmail.com>
+
+ * powerpc.cc (Target_powerpc::make_iplt_section): Check that
+ output_section exists before attempting add_output_section_data.
+ (Target_powerpc::make_brlt_section): Likewise.
+
2017-02-15 Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com>
* mips.cc (Target_mips::Scan::get_reference_flags): Remove
diff --git a/gold/powerpc.cc b/gold/powerpc.cc
index 4abfcec..1477a10 100644
--- a/gold/powerpc.cc
+++ b/gold/powerpc.cc
@@ -3608,11 +3608,13 @@ Target_powerpc<size, big_endian>::make_iplt_section(Symbol_table* symtab,
this->make_plt_section(symtab, layout);
Reloc_section* iplt_rel = new Reloc_section(false);
- this->rela_dyn_->output_section()->add_output_section_data(iplt_rel);
+ if (this->rela_dyn_->output_section())
+ this->rela_dyn_->output_section()->add_output_section_data(iplt_rel);
this->iplt_
= new Output_data_plt_powerpc<size, big_endian>(this, iplt_rel,
"** IPLT");
- this->plt_->output_section()->add_output_section_data(this->iplt_);
+ if (this->plt_->output_section())
+ this->plt_->output_section()->add_output_section_data(this->iplt_);
}
}
@@ -3708,14 +3710,16 @@ Target_powerpc<size, big_endian>::make_brlt_section(Layout* layout)
{
// When PIC we can't fill in .branch_lt (like .plt it can be
// a bss style section) but must initialise at runtime via
- // dynamic relocats.
+ // dynamic relocations.
this->rela_dyn_section(layout);
brlt_rel = new Reloc_section(false);
- this->rela_dyn_->output_section()->add_output_section_data(brlt_rel);
+ if (this->rela_dyn_->output_section())
+ this->rela_dyn_->output_section()
+ ->add_output_section_data(brlt_rel);
}
this->brlt_section_
= new Output_data_brlt_powerpc<size, big_endian>(this, brlt_rel);
- if (this->plt_ && is_pic)
+ if (this->plt_ && is_pic && this->plt_->output_section())
this->plt_->output_section()
->add_output_section_data(this->brlt_section_);
else