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-rw-r--r--gas/ChangeLog9
-rw-r--r--gas/testsuite/gas/i386/noreg64-data16.d2
-rw-r--r--gas/testsuite/gas/i386/noreg64.d2
-rw-r--r--gas/testsuite/gas/i386/x86-64-intel64.d2
-rw-r--r--gas/testsuite/gas/i386/x86-64-opcode.d2
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/i386-dis.c2
7 files changed, 19 insertions, 5 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index ae5a614..bd08340 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,14 @@
2020-10-05 H.J. Lu <hongjiu.lu@intel.com>
+ PR binutils/26704
+ * testsuite/gas/i386/noreg64-data16.d: Expect sysretl instead of
+ sysret.
+ * testsuite/gas/i386/noreg64.d: Likewise.
+ * testsuite/gas/i386/x86-64-intel64.d: Likewise.
+ * testsuite/gas/i386/x86-64-opcode.d: Likewise.
+
+2020-10-05 H.J. Lu <hongjiu.lu@intel.com>
+
PR binutils/26705
* testsuite/gas/i386/x86-64-suffix.s: Add "mov %rsp,%rbp" before
sysretq.
diff --git a/gas/testsuite/gas/i386/noreg64-data16.d b/gas/testsuite/gas/i386/noreg64-data16.d
index 81afa9f..881043d 100644
--- a/gas/testsuite/gas/i386/noreg64-data16.d
+++ b/gas/testsuite/gas/i386/noreg64-data16.d
@@ -150,7 +150,7 @@ Disassembly of section .text:
*[a-f0-9]+: 66 81 28 89 00 subw \$0x89,\(%rax\)
*[a-f0-9]+: 66 81 28 34 12 subw \$0x1234,\(%rax\)
*[a-f0-9]+: 66 81 28 78 56 subw \$0x5678,\(%rax\)
- *[a-f0-9]+: 66 0f 07 data16 sysret *
+ *[a-f0-9]+: 66 0f 07 data16 sysretl *
*[a-f0-9]+: 66 f7 00 89 00 testw \$0x89,\(%rax\)
*[a-f0-9]+: 66 f7 00 34 12 testw \$0x1234,\(%rax\)
*[a-f0-9]+: 66 f7 00 78 56 testw \$0x5678,\(%rax\)
diff --git a/gas/testsuite/gas/i386/noreg64.d b/gas/testsuite/gas/i386/noreg64.d
index 3345704..6cc461f 100644
--- a/gas/testsuite/gas/i386/noreg64.d
+++ b/gas/testsuite/gas/i386/noreg64.d
@@ -151,7 +151,7 @@ Disassembly of section .text:
*[a-f0-9]+: 81 28 89 00 00 00 subl \$0x89,\(%rax\)
*[a-f0-9]+: 81 28 34 12 00 00 subl \$0x1234,\(%rax\)
*[a-f0-9]+: 81 28 78 56 34 12 subl \$0x12345678,\(%rax\)
- *[a-f0-9]+: 0f 07 sysret *
+ *[a-f0-9]+: 0f 07 sysretl *
*[a-f0-9]+: f7 00 89 00 00 00 testl \$0x89,\(%rax\)
*[a-f0-9]+: f7 00 34 12 00 00 testl \$0x1234,\(%rax\)
*[a-f0-9]+: f7 00 78 56 34 12 testl \$0x12345678,\(%rax\)
diff --git a/gas/testsuite/gas/i386/x86-64-intel64.d b/gas/testsuite/gas/i386/x86-64-intel64.d
index 10c820f..496e2e5 100644
--- a/gas/testsuite/gas/i386/x86-64-intel64.d
+++ b/gas/testsuite/gas/i386/x86-64-intel64.d
@@ -15,7 +15,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 48 ff 18 rex\.W lcall \*\(%rax\)
[ ]*[a-f0-9]+: 48 ff 29 rex\.W ljmp \*\(%rcx\)
[ ]*[a-f0-9]+: 0f 05 syscall
-[ ]*[a-f0-9]+: 0f 07 sysret
+[ ]*[a-f0-9]+: 0f 07 sysretl
[ ]*[a-f0-9]+: 48 0f 07 sysretq *
[ ]*[a-f0-9]+: 48 0f b4 01 lfs \(%rcx\),%rax
[ ]*[a-f0-9]+: 48 0f b4 01 lfs \(%rcx\),%rax
diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d
index 10cde81..ab55d2c 100644
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -321,7 +321,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 66 0f 00 c8 str %ax
[ ]*[a-f0-9]+: 0f 00 08 str \(%rax\)
[ ]*[a-f0-9]+: 0f 05 syscall
-[ ]*[a-f0-9]+: 0f 07 sysret
+[ ]*[a-f0-9]+: 0f 07 sysretl
[ ]*[a-f0-9]+: 48 0f 07 sysretq *
[ ]*[a-f0-9]+: 0f 01 f8 swapgs
[ ]*[a-f0-9]+: 66 68 22 22 pushw \$0x2222
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f1b4273..3c74fbf 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,10 @@
2020-10-05 H.J. Lu <hongjiu.lu@intel.com>
+ PR binutils/26704
+ * i386-dis.c (putop): Always display suffix for %LQ in 64bit.
+
+2020-10-05 H.J. Lu <hongjiu.lu@intel.com>
+
PR binutils/26705
* i386-dis.c (print_insn): Clear modrm if not needed.
(putop): Check need_modrm for modrm.mod != 3. Don't check
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index f4f35bc..4d8f4f4 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -10870,7 +10870,7 @@ putop (const char *in_template, int sizeflag)
USED_REX (REX_W);
*obufp++ = 'q';
}
- else if((address_mode == mode_64bit && need_modrm && cond)
+ else if((address_mode == mode_64bit && cond)
|| (sizeflag & SUFFIX_ALWAYS))
*obufp++ = intel_syntax? 'd' : 'l';
}