14 files changed, 597 insertions, 16 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index bf7b963..2c09ca2 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,19 @@
 2020-09-08  Alex Coplan  <alex.coplan@arm.com>
 
+	* config/tc-aarch64.c (parse_sys_reg): Also pass sysreg name to
+	validation function.
+	(parse_sys_ins_reg): Likewise.
+	(print_operands): Pass CPU features to aarch64_print_operand().
+	* testsuite/gas/aarch64/v8-r-bad-sysregs.d: New test.
+	* testsuite/gas/aarch64/v8-r-bad-sysregs.l: Error output.
+	* testsuite/gas/aarch64/v8-r-bad-sysregs.s: Input.
+	* testsuite/gas/aarch64/v8-r-sysregs-need-arch.d: New test.
+	* testsuite/gas/aarch64/v8-r-sysregs-need-arch.l: Error output.
+	* testsuite/gas/aarch64/v8-r-sysregs.d: New test.
+	* testsuite/gas/aarch64/v8-r-sysregs.s: Input for previous two tests.
+
+2020-09-08  Alex Coplan  <alex.coplan@arm.com>
+
 	* testsuite/gas/aarch64/dfb.d: New test.
 	* testsuite/gas/aarch64/dfb.s: Input.
 
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index effa976..b2a1683 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -4141,8 +4141,8 @@ parse_sys_reg (char **str, htab_t sys_regs,
 	as_bad (_("selected processor does not support PSTATE field "
 		  "name '%s'"), buf);
       if (!pstatefield_p
-	  && !aarch64_sys_ins_reg_supported_p (cpu_variant, o->value,
-					       o->flags, o->features))
+	  && !aarch64_sys_ins_reg_supported_p (cpu_variant, o->name,
+					       o->value, o->flags, o->features))
 	as_bad (_("selected processor does not support system register "
 		  "name '%s'"), buf);
       if (aarch64_sys_reg_deprecated_p (o->flags))
@@ -4183,7 +4183,8 @@ parse_sys_ins_reg (char **str, htab_t sys_ins_regs)
   if (!o)
     return NULL;
 
-  if (!aarch64_sys_ins_reg_supported_p (cpu_variant, o->value, o->flags, 0))
+  if (!aarch64_sys_ins_reg_supported_p (cpu_variant,
+					o->name, o->value, o->flags, 0))
     as_bad (_("selected processor does not support system register "
 	      "name '%s'"), buf);
   if (aarch64_sys_reg_deprecated_p (o->flags))
@@ -4715,7 +4716,7 @@ print_operands (char *buf, const aarch64_opcode *opcode,
 
       /* Generate the operand string in STR.  */
       aarch64_print_operand (str, sizeof (str), 0, opcode, opnds, i, NULL, NULL,
-			     NULL);
+			     NULL, cpu_variant);
 
       /* Delimiter.  */
       if (str[0] != '\0')
diff --git a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d
new file mode 100644
index 0000000..6677f3b
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d
@@ -0,0 +1,3 @@
+#name: invalid system registers for Armv8-R AArch64
+#source: v8-r-bad-sysregs.s
+#error_output: v8-r-bad-sysregs.l
diff --git a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l
new file mode 100644
index 0000000..51ac298
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l
@@ -0,0 +1,14 @@
+[^:]*: Assembler messages:
+.*: Error: selected processor does not support system register name 'sctlr_el3'
+.*: Error: selected processor does not support system register name 'ttbr0_el3'
+.*: Error: selected processor does not support system register name 'tcr_el3'
+.*: Warning: specified register cannot be written to at operand 1 -- `msr mpuir_el1,x0'
+.*: Warning: specified register cannot be written to at operand 1 -- `msr mpuir_el2,x0'
+.*: Error: selected processor does not support system register name 'ttbr0_el2'
+.*: Error: selected processor does not support system register name 'ttbr0_el2'
+.*: Error: selected processor does not support system register name 'ttbr1_el2'
+.*: Error: selected processor does not support system register name 'ttbr1_el2'
+.*: Error: selected processor does not support system register name 'vsttbr_el2'
+.*: Error: selected processor does not support system register name 'vsttbr_el2'
+.*: Error: selected processor does not support system register name 'vttbr_el2'
+.*: Error: selected processor does not support system register name 'vttbr_el2'
diff --git a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s
new file mode 100644
index 0000000..1a8f488
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s
@@ -0,0 +1,23 @@
+// Invalid system registers for Armv8-R AArch64
+.arch armv8-r
+
+// No EL3 for Armv8-R
+mrs x0, sctlr_el3
+msr ttbr0_el3, x0
+mrs x0, TCR_EL3
+
+msr mpuir_el1, x0 // write to read-only register
+msr mpuir_el2, x0 // write to read-only register
+
+// Four sysregs are not in R-profile:
+mrs x0, ttbr0_el2
+msr ttbr0_el2, x0
+
+mrs x0, ttbr1_el2
+msr ttbr1_el2, x0
+
+mrs x0, vsttbr_el2
+msr vsttbr_el2, x0
+
+mrs x0, vttbr_el2
+msr vttbr_el2, x0
diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d b/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d
new file mode 100644
index 0000000..af83196
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d
@@ -0,0 +1,3 @@
+#name: check that Armv8-R system registers are rejected without -march=armv8-r
+#source: v8-r-sysregs.s
+#error_output: v8-r-sysregs-need-arch.l
diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l b/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l
new file mode 100644
index 0000000..a609afc
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l
@@ -0,0 +1,141 @@
+[^:]*: Assembler messages:
+.*: Error: selected processor does not support system register name 'mpuir_el1'
+.*: Error: selected processor does not support system register name 'mpuir_el2'
+.*: Error: selected processor does not support system register name 'prbar_el1'
+.*: Error: selected processor does not support system register name 'prbar_el1'
+.*: Error: selected processor does not support system register name 'prbar_el2'
+.*: Error: selected processor does not support system register name 'prbar_el2'
+.*: Error: selected processor does not support system register name 'prbar1_el1'
+.*: Error: selected processor does not support system register name 'prbar1_el1'
+.*: Error: selected processor does not support system register name 'prbar2_el1'
+.*: Error: selected processor does not support system register name 'prbar2_el1'
+.*: Error: selected processor does not support system register name 'prbar3_el1'
+.*: Error: selected processor does not support system register name 'prbar3_el1'
+.*: Error: selected processor does not support system register name 'prbar4_el1'
+.*: Error: selected processor does not support system register name 'prbar4_el1'
+.*: Error: selected processor does not support system register name 'prbar5_el1'
+.*: Error: selected processor does not support system register name 'prbar5_el1'
+.*: Error: selected processor does not support system register name 'prbar6_el1'
+.*: Error: selected processor does not support system register name 'prbar6_el1'
+.*: Error: selected processor does not support system register name 'prbar7_el1'
+.*: Error: selected processor does not support system register name 'prbar7_el1'
+.*: Error: selected processor does not support system register name 'prbar8_el1'
+.*: Error: selected processor does not support system register name 'prbar8_el1'
+.*: Error: selected processor does not support system register name 'prbar9_el1'
+.*: Error: selected processor does not support system register name 'prbar9_el1'
+.*: Error: selected processor does not support system register name 'prbar10_el1'
+.*: Error: selected processor does not support system register name 'prbar10_el1'
+.*: Error: selected processor does not support system register name 'prbar11_el1'
+.*: Error: selected processor does not support system register name 'prbar11_el1'
+.*: Error: selected processor does not support system register name 'prbar12_el1'
+.*: Error: selected processor does not support system register name 'prbar12_el1'
+.*: Error: selected processor does not support system register name 'prbar13_el1'
+.*: Error: selected processor does not support system register name 'prbar13_el1'
+.*: Error: selected processor does not support system register name 'prbar14_el1'
+.*: Error: selected processor does not support system register name 'prbar14_el1'
+.*: Error: selected processor does not support system register name 'prbar15_el1'
+.*: Error: selected processor does not support system register name 'prbar15_el1'
+.*: Error: selected processor does not support system register name 'prbar1_el2'
+.*: Error: selected processor does not support system register name 'prbar1_el2'
+.*: Error: selected processor does not support system register name 'prbar2_el2'
+.*: Error: selected processor does not support system register name 'prbar2_el2'
+.*: Error: selected processor does not support system register name 'prbar3_el2'
+.*: Error: selected processor does not support system register name 'prbar3_el2'
+.*: Error: selected processor does not support system register name 'prbar4_el2'
+.*: Error: selected processor does not support system register name 'prbar4_el2'
+.*: Error: selected processor does not support system register name 'prbar5_el2'
+.*: Error: selected processor does not support system register name 'prbar5_el2'
+.*: Error: selected processor does not support system register name 'prbar6_el2'
+.*: Error: selected processor does not support system register name 'prbar6_el2'
+.*: Error: selected processor does not support system register name 'prbar7_el2'
+.*: Error: selected processor does not support system register name 'prbar7_el2'
+.*: Error: selected processor does not support system register name 'prbar8_el2'
+.*: Error: selected processor does not support system register name 'prbar8_el2'
+.*: Error: selected processor does not support system register name 'prbar9_el2'
+.*: Error: selected processor does not support system register name 'prbar9_el2'
+.*: Error: selected processor does not support system register name 'prbar10_el2'
+.*: Error: selected processor does not support system register name 'prbar10_el2'
+.*: Error: selected processor does not support system register name 'prbar11_el2'
+.*: Error: selected processor does not support system register name 'prbar11_el2'
+.*: Error: selected processor does not support system register name 'prbar12_el2'
+.*: Error: selected processor does not support system register name 'prbar12_el2'
+.*: Error: selected processor does not support system register name 'prbar13_el2'
+.*: Error: selected processor does not support system register name 'prbar13_el2'
+.*: Error: selected processor does not support system register name 'prbar14_el2'
+.*: Error: selected processor does not support system register name 'prbar14_el2'
+.*: Error: selected processor does not support system register name 'prbar15_el2'
+.*: Error: selected processor does not support system register name 'prbar15_el2'
+.*: Error: selected processor does not support system register name 'prenr_el1'
+.*: Error: selected processor does not support system register name 'prenr_el1'
+.*: Error: selected processor does not support system register name 'prenr_el2'
+.*: Error: selected processor does not support system register name 'prenr_el2'
+.*: Error: selected processor does not support system register name 'prlar_el1'
+.*: Error: selected processor does not support system register name 'prlar_el1'
+.*: Error: selected processor does not support system register name 'prlar_el2'
+.*: Error: selected processor does not support system register name 'prlar_el2'
+.*: Error: selected processor does not support system register name 'prlar1_el1'
+.*: Error: selected processor does not support system register name 'prlar1_el1'
+.*: Error: selected processor does not support system register name 'prlar2_el1'
+.*: Error: selected processor does not support system register name 'prlar2_el1'
+.*: Error: selected processor does not support system register name 'prlar3_el1'
+.*: Error: selected processor does not support system register name 'prlar3_el1'
+.*: Error: selected processor does not support system register name 'prlar4_el1'
+.*: Error: selected processor does not support system register name 'prlar4_el1'
+.*: Error: selected processor does not support system register name 'prlar5_el1'
+.*: Error: selected processor does not support system register name 'prlar5_el1'
+.*: Error: selected processor does not support system register name 'prlar6_el1'
+.*: Error: selected processor does not support system register name 'prlar6_el1'
+.*: Error: selected processor does not support system register name 'prlar7_el1'
+.*: Error: selected processor does not support system register name 'prlar7_el1'
+.*: Error: selected processor does not support system register name 'prlar8_el1'
+.*: Error: selected processor does not support system register name 'prlar8_el1'
+.*: Error: selected processor does not support system register name 'prlar9_el1'
+.*: Error: selected processor does not support system register name 'prlar9_el1'
+.*: Error: selected processor does not support system register name 'prlar10_el1'
+.*: Error: selected processor does not support system register name 'prlar10_el1'
+.*: Error: selected processor does not support system register name 'prlar11_el1'
+.*: Error: selected processor does not support system register name 'prlar11_el1'
+.*: Error: selected processor does not support system register name 'prlar12_el1'
+.*: Error: selected processor does not support system register name 'prlar12_el1'
+.*: Error: selected processor does not support system register name 'prlar13_el1'
+.*: Error: selected processor does not support system register name 'prlar13_el1'
+.*: Error: selected processor does not support system register name 'prlar14_el1'
+.*: Error: selected processor does not support system register name 'prlar14_el1'
+.*: Error: selected processor does not support system register name 'prlar15_el1'
+.*: Error: selected processor does not support system register name 'prlar15_el1'
+.*: Error: selected processor does not support system register name 'prlar1_el2'
+.*: Error: selected processor does not support system register name 'prlar1_el2'
+.*: Error: selected processor does not support system register name 'prlar2_el2'
+.*: Error: selected processor does not support system register name 'prlar2_el2'
+.*: Error: selected processor does not support system register name 'prlar3_el2'
+.*: Error: selected processor does not support system register name 'prlar3_el2'
+.*: Error: selected processor does not support system register name 'prlar4_el2'
+.*: Error: selected processor does not support system register name 'prlar4_el2'
+.*: Error: selected processor does not support system register name 'prlar5_el2'
+.*: Error: selected processor does not support system register name 'prlar5_el2'
+.*: Error: selected processor does not support system register name 'prlar6_el2'
+.*: Error: selected processor does not support system register name 'prlar6_el2'
+.*: Error: selected processor does not support system register name 'prlar7_el2'
+.*: Error: selected processor does not support system register name 'prlar7_el2'
+.*: Error: selected processor does not support system register name 'prlar8_el2'
+.*: Error: selected processor does not support system register name 'prlar8_el2'
+.*: Error: selected processor does not support system register name 'prlar9_el2'
+.*: Error: selected processor does not support system register name 'prlar9_el2'
+.*: Error: selected processor does not support system register name 'prlar10_el2'
+.*: Error: selected processor does not support system register name 'prlar10_el2'
+.*: Error: selected processor does not support system register name 'prlar11_el2'
+.*: Error: selected processor does not support system register name 'prlar11_el2'
+.*: Error: selected processor does not support system register name 'prlar12_el2'
+.*: Error: selected processor does not support system register name 'prlar12_el2'
+.*: Error: selected processor does not support system register name 'prlar13_el2'
+.*: Error: selected processor does not support system register name 'prlar13_el2'
+.*: Error: selected processor does not support system register name 'prlar14_el2'
+.*: Error: selected processor does not support system register name 'prlar14_el2'
+.*: Error: selected processor does not support system register name 'prlar15_el2'
+.*: Error: selected processor does not support system register name 'prlar15_el2'
+.*: Error: selected processor does not support system register name 'prselr_el1'
+.*: Error: selected processor does not support system register name 'prselr_el1'
+.*: Error: selected processor does not support system register name 'prselr_el2'
+.*: Error: selected processor does not support system register name 'prselr_el2'
+.*: Error: selected processor does not support system register name 'vsctlr_el2'
+.*: Error: selected processor does not support system register name 'vsctlr_el2'
diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs.d b/gas/testsuite/gas/aarch64/v8-r-sysregs.d
new file mode 100644
index 0000000..aa8321e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/v8-r-sysregs.d
@@ -0,0 +1,149 @@
+#name: Exhaustive test of Armv8-R system registers
+#as: -march=armv8-r
+#objdump: -dr -m aarch64:armv8-r
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*:	d5380080 	mrs	x0, mpuir_el1
+.*:	d53c0080 	mrs	x0, mpuir_el2
+.*:	d5386800 	mrs	x0, prbar_el1
+.*:	d5186800 	msr	prbar_el1, x0
+.*:	d53c6800 	mrs	x0, prbar_el2
+.*:	d51c6800 	msr	prbar_el2, x0
+.*:	d5386880 	mrs	x0, prbar1_el1
+.*:	d5186880 	msr	prbar1_el1, x0
+.*:	d5386900 	mrs	x0, prbar2_el1
+.*:	d5186900 	msr	prbar2_el1, x0
+.*:	d5386980 	mrs	x0, prbar3_el1
+.*:	d5186980 	msr	prbar3_el1, x0
+.*:	d5386a00 	mrs	x0, prbar4_el1
+.*:	d5186a00 	msr	prbar4_el1, x0
+.*:	d5386a80 	mrs	x0, prbar5_el1
+.*:	d5186a80 	msr	prbar5_el1, x0
+.*:	d5386b00 	mrs	x0, prbar6_el1
+.*:	d5186b00 	msr	prbar6_el1, x0
+.*:	d5386b80 	mrs	x0, prbar7_el1
+.*:	d5186b80 	msr	prbar7_el1, x0
+.*:	d5386c00 	mrs	x0, prbar8_el1
+.*:	d5186c00 	msr	prbar8_el1, x0
+.*:	d5386c80 	mrs	x0, prbar9_el1
+.*:	d5186c80 	msr	prbar9_el1, x0
+.*:	d5386d00 	mrs	x0, prbar10_el1
+.*:	d5186d00 	msr	prbar10_el1, x0
+.*:	d5386d80 	mrs	x0, prbar11_el1
+.*:	d5186d80 	msr	prbar11_el1, x0
+.*:	d5386e00 	mrs	x0, prbar12_el1
+.*:	d5186e00 	msr	prbar12_el1, x0
+.*:	d5386e80 	mrs	x0, prbar13_el1
+.*:	d5186e80 	msr	prbar13_el1, x0
+.*:	d5386f00 	mrs	x0, prbar14_el1
+.*:	d5186f00 	msr	prbar14_el1, x0
+.*:	d5386f80 	mrs	x0, prbar15_el1
+.*:	d5186f80 	msr	prbar15_el1, x0
+.*:	d53c6880 	mrs	x0, prbar1_el2
+.*:	d51c6880 	msr	prbar1_el2, x0
+.*:	d53c6900 	mrs	x0, prbar2_el2
+.*:	d51c6900 	msr	prbar2_el2, x0
+.*:	d53c6980 	mrs	x0, prbar3_el2
+.*:	d51c6980 	msr	prbar3_el2, x0
+.*:	d53c6a00 	mrs	x0, prbar4_el2
+.*:	d51c6a00 	msr	prbar4_el2, x0
+.*:	d53c6a80 	mrs	x0, prbar5_el2
+.*:	d51c6a80 	msr	prbar5_el2, x0
+.*:	d53c6b00 	mrs	x0, prbar6_el2
+.*:	d51c6b00 	msr	prbar6_el2, x0
+.*:	d53c6b80 	mrs	x0, prbar7_el2
+.*:	d51c6b80 	msr	prbar7_el2, x0
+.*:	d53c6c00 	mrs	x0, prbar8_el2
+.*:	d51c6c00 	msr	prbar8_el2, x0
+.*:	d53c6c80 	mrs	x0, prbar9_el2
+.*:	d51c6c80 	msr	prbar9_el2, x0
+.*:	d53c6d00 	mrs	x0, prbar10_el2
+.*:	d51c6d00 	msr	prbar10_el2, x0
+.*:	d53c6d80 	mrs	x0, prbar11_el2
+.*:	d51c6d80 	msr	prbar11_el2, x0
+.*:	d53c6e00 	mrs	x0, prbar12_el2
+.*:	d51c6e00 	msr	prbar12_el2, x0
+.*:	d53c6e80 	mrs	x0, prbar13_el2
+.*:	d51c6e80 	msr	prbar13_el2, x0
+.*:	d53c6f00 	mrs	x0, prbar14_el2
+.*:	d51c6f00 	msr	prbar14_el2, x0
+.*:	d53c6f80 	mrs	x0, prbar15_el2
+.*:	d51c6f80 	msr	prbar15_el2, x0
+.*:	d5386120 	mrs	x0, prenr_el1
+.*:	d5186120 	msr	prenr_el1, x0
+.*:	d53c6120 	mrs	x0, prenr_el2
+.*:	d51c6120 	msr	prenr_el2, x0
+.*:	d5386820 	mrs	x0, prlar_el1
+.*:	d5186820 	msr	prlar_el1, x0
+.*:	d53c6820 	mrs	x0, prlar_el2
+.*:	d51c6820 	msr	prlar_el2, x0
+.*:	d53868a0 	mrs	x0, prlar1_el1
+.*:	d51868a0 	msr	prlar1_el1, x0
+.*:	d5386920 	mrs	x0, prlar2_el1
+.*:	d5186920 	msr	prlar2_el1, x0
+.*:	d53869a0 	mrs	x0, prlar3_el1
+.*:	d51869a0 	msr	prlar3_el1, x0
+.*:	d5386a20 	mrs	x0, prlar4_el1
+.*:	d5186a20 	msr	prlar4_el1, x0
+.*:	d5386aa0 	mrs	x0, prlar5_el1
+.*:	d5186aa0 	msr	prlar5_el1, x0
+.*:	d5386b20 	mrs	x0, prlar6_el1
+.*:	d5186b20 	msr	prlar6_el1, x0
+.*:	d5386ba0 	mrs	x0, prlar7_el1
+.*:	d5186ba0 	msr	prlar7_el1, x0
+.*:	d5386c20 	mrs	x0, prlar8_el1
+.*:	d5186c20 	msr	prlar8_el1, x0
+.*:	d5386ca0 	mrs	x0, prlar9_el1
+.*:	d5186ca0 	msr	prlar9_el1, x0
+.*:	d5386d20 	mrs	x0, prlar10_el1
+.*:	d5186d20 	msr	prlar10_el1, x0
+.*:	d5386da0 	mrs	x0, prlar11_el1
+.*:	d5186da0 	msr	prlar11_el1, x0
+.*:	d5386e20 	mrs	x0, prlar12_el1
+.*:	d5186e20 	msr	prlar12_el1, x0
+.*:	d5386ea0 	mrs	x0, prlar13_el1
+.*:	d5186ea0 	msr	prlar13_el1, x0
+.*:	d5386f20 	mrs	x0, prlar14_el1
+.*:	d5186f20 	msr	prlar14_el1, x0
+.*:	d5386fa0 	mrs	x0, prlar15_el1
+.*:	d5186fa0 	msr	prlar15_el1, x0
+.*:	d53c68a0 	mrs	x0, prlar1_el2
+.*:	d51c68a0 	msr	prlar1_el2, x0
+.*:	d53c6920 	mrs	x0, prlar2_el2
+.*:	d51c6920 	msr	prlar2_el2, x0
+.*:	d53c69a0 	mrs	x0, prlar3_el2
+.*:	d51c69a0 	msr	prlar3_el2, x0
+.*:	d53c6a20 	mrs	x0, prlar4_el2
+.*:	d51c6a20 	msr	prlar4_el2, x0
+.*:	d53c6aa0 	mrs	x0, prlar5_el2
+.*:	d51c6aa0 	msr	prlar5_el2, x0
+.*:	d53c6b20 	mrs	x0, prlar6_el2
+.*:	d51c6b20 	msr	prlar6_el2, x0
+.*:	d53c6ba0 	mrs	x0, prlar7_el2
+.*:	d51c6ba0 	msr	prlar7_el2, x0
+.*:	d53c6c20 	mrs	x0, prlar8_el2
+.*:	d51c6c20 	msr	prlar8_el2, x0
+.*:	d53c6ca0 	mrs	x0, prlar9_el2
+.*:	d51c6ca0 	msr	prlar9_el2, x0
+.*:	d53c6d20 	mrs	x0, prlar10_el2
+.*:	d51c6d20 	msr	prlar10_el2, x0
+.*:	d53c6da0 	mrs	x0, prlar11_el2
+.*:	d51c6da0 	msr	prlar11_el2, x0
+.*:	d53c6e20 	mrs	x0, prlar12_el2
+.*:	d51c6e20 	msr	prlar12_el2, x0
+.*:	d53c6ea0 	mrs	x0, prlar13_el2
+.*:	d51c6ea0 	msr	prlar13_el2, x0
+.*:	d53c6f20 	mrs	x0, prlar14_el2
+.*:	d51c6f20 	msr	prlar14_el2, x0
+.*:	d53c6fa0 	mrs	x0, prlar15_el2
+.*:	d51c6fa0 	msr	prlar15_el2, x0
+.*:	d5386220 	mrs	x0, prselr_el1
+.*:	d5186220 	msr	prselr_el1, x0
+.*:	d53c6220 	mrs	x0, prselr_el2
+.*:	d51c6220 	msr	prselr_el2, x0
+.*:	d53c2000 	mrs	x0, vsctlr_el2
+.*:	d51c2000 	msr	vsctlr_el2, x0
diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs.s b/gas/testsuite/gas/aarch64/v8-r-sysregs.s
new file mode 100644
index 0000000..76c80bd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/v8-r-sysregs.s
@@ -0,0 +1,141 @@
+// Armv8-R system registers
+mrs x0, mpuir_el1
+mrs x0, mpuir_el2
+mrs x0, prbar_el1
+msr prbar_el1, x0
+mrs x0, prbar_el2
+msr prbar_el2, x0
+mrs x0, prbar1_el1
+msr prbar1_el1, x0
+mrs x0, prbar2_el1
+msr prbar2_el1, x0
+mrs x0, prbar3_el1
+msr prbar3_el1, x0
+mrs x0, prbar4_el1
+msr prbar4_el1, x0
+mrs x0, prbar5_el1
+msr prbar5_el1, x0
+mrs x0, prbar6_el1
+msr prbar6_el1, x0
+mrs x0, prbar7_el1
+msr prbar7_el1, x0
+mrs x0, prbar8_el1
+msr prbar8_el1, x0
+mrs x0, prbar9_el1
+msr prbar9_el1, x0
+mrs x0, prbar10_el1
+msr prbar10_el1, x0
+mrs x0, prbar11_el1
+msr prbar11_el1, x0
+mrs x0, prbar12_el1
+msr prbar12_el1, x0
+mrs x0, prbar13_el1
+msr prbar13_el1, x0
+mrs x0, prbar14_el1
+msr prbar14_el1, x0
+mrs x0, prbar15_el1
+msr prbar15_el1, x0
+mrs x0, prbar1_el2
+msr prbar1_el2, x0
+mrs x0, prbar2_el2
+msr prbar2_el2, x0
+mrs x0, prbar3_el2
+msr prbar3_el2, x0
+mrs x0, prbar4_el2
+msr prbar4_el2, x0
+mrs x0, prbar5_el2
+msr prbar5_el2, x0
+mrs x0, prbar6_el2
+msr prbar6_el2, x0
+mrs x0, prbar7_el2
+msr prbar7_el2, x0
+mrs x0, prbar8_el2
+msr prbar8_el2, x0
+mrs x0, prbar9_el2
+msr prbar9_el2, x0
+mrs x0, prbar10_el2
+msr prbar10_el2, x0
+mrs x0, prbar11_el2
+msr prbar11_el2, x0
+mrs x0, prbar12_el2
+msr prbar12_el2, x0
+mrs x0, prbar13_el2
+msr prbar13_el2, x0
+mrs x0, prbar14_el2
+msr prbar14_el2, x0
+mrs x0, prbar15_el2
+msr prbar15_el2, x0
+mrs x0, prenr_el1
+msr prenr_el1, x0
+mrs x0, prenr_el2
+msr prenr_el2, x0
+mrs x0, prlar_el1
+msr prlar_el1, x0
+mrs x0, prlar_el2
+msr prlar_el2, x0
+mrs x0, prlar1_el1
+msr prlar1_el1, x0
+mrs x0, prlar2_el1
+msr prlar2_el1, x0
+mrs x0, prlar3_el1
+msr prlar3_el1, x0
+mrs x0, prlar4_el1
+msr prlar4_el1, x0
+mrs x0, prlar5_el1
+msr prlar5_el1, x0
+mrs x0, prlar6_el1
+msr prlar6_el1, x0
+mrs x0, prlar7_el1
+msr prlar7_el1, x0
+mrs x0, prlar8_el1
+msr prlar8_el1, x0
+mrs x0, prlar9_el1
+msr prlar9_el1, x0
+mrs x0, prlar10_el1
+msr prlar10_el1, x0
+mrs x0, prlar11_el1
+msr prlar11_el1, x0
+mrs x0, prlar12_el1
+msr prlar12_el1, x0
+mrs x0, prlar13_el1
+msr prlar13_el1, x0
+mrs x0, prlar14_el1
+msr prlar14_el1, x0
+mrs x0, prlar15_el1
+msr prlar15_el1, x0
+mrs x0, prlar1_el2
+msr prlar1_el2, x0
+mrs x0, prlar2_el2
+msr prlar2_el2, x0
+mrs x0, prlar3_el2
+msr prlar3_el2, x0
+mrs x0, prlar4_el2
+msr prlar4_el2, x0
+mrs x0, prlar5_el2
+msr prlar5_el2, x0
+mrs x0, prlar6_el2
+msr prlar6_el2, x0
+mrs x0, prlar7_el2
+msr prlar7_el2, x0
+mrs x0, prlar8_el2
+msr prlar8_el2, x0
+mrs x0, prlar9_el2
+msr prlar9_el2, x0
+mrs x0, prlar10_el2
+msr prlar10_el2, x0
+mrs x0, prlar11_el2
+msr prlar11_el2, x0
+mrs x0, prlar12_el2
+msr prlar12_el2, x0
+mrs x0, prlar13_el2
+msr prlar13_el2, x0
+mrs x0, prlar14_el2
+msr prlar14_el2, x0
+mrs x0, prlar15_el2
+msr prlar15_el2, x0
+mrs x0, prselr_el1
+msr prselr_el1, x0
+mrs x0, prselr_el2
+msr prselr_el2, x0
+mrs x0, vsctlr_el2
+msr vsctlr_el2, x0
diff --git a/include/ChangeLog b/include/ChangeLog
index 10a3c7d..eff8116 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,5 +1,12 @@
 2020-09-08  Alex Coplan  <alex.coplan@arm.com>
 
+	* opcode/aarch64.h (aarch64_sys_ins_reg_supported_p): Also take
+	system register name in order to simplify validation for v8-R.
+	(aarch64_print_operand): Also take CPU feature set, as disassembly for
+	system registers now depends on arch variant.
+
+2020-09-08  Alex Coplan  <alex.coplan@arm.com>
+
 	* opcode/aarch64.h (AARCH64_FEATURE_V8_A): New.
 	(AARCH64_FEATURE_V8_R): New.
 	(AARCH64_ARCH_V8): Include new A-profile feature bit.
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 85f4fb5..4462648 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -977,7 +977,8 @@ typedef struct
 
 extern bfd_boolean aarch64_sys_ins_reg_has_xt (const aarch64_sys_ins_reg *);
 extern bfd_boolean
-aarch64_sys_ins_reg_supported_p (const aarch64_feature_set, aarch64_insn,
+aarch64_sys_ins_reg_supported_p (const aarch64_feature_set,
+				 const char *reg_name, aarch64_insn,
                                  uint32_t, aarch64_feature_set);
 
 extern const aarch64_sys_ins_reg aarch64_sys_regs_ic [];
@@ -1270,7 +1271,8 @@ aarch64_get_opcode (enum aarch64_op);
 extern void
 aarch64_print_operand (char *, size_t, bfd_vma, const aarch64_opcode *,
 		       const aarch64_opnd_info *, int, int *, bfd_vma *,
-		       char **);
+		       char **,
+		       aarch64_feature_set features);
 
 /* Miscellaneous interface.  */
 
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 303d08d..adef90c 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,27 @@
 2020-09-08  Alex Coplan  <alex.coplan@arm.com>
 
+	* aarch64-dis.c (print_operands): Pass CPU features to
+	aarch64_print_operand().
+	* aarch64-opc.c (aarch64_print_operand): Use CPU features to determine
+	preferred disassembly of system registers.
+	(SR_RNG): Refactor to use new SR_FEAT2 macro.
+	(SR_FEAT2): New.
+	(SR_V8_1_A): New.
+	(SR_V8_4_A): New.
+	(SR_V8_A): New.
+	(SR_V8_R): New.
+	(SR_EXPAND_ELx): New.
+	(SR_EXPAND_EL12): New.
+	(aarch64_sys_regs): Specify which registers are only on
+	A-profile, add R-profile system registers.
+	(ENC_BARLAR): New.
+	(PRBARn_ELx): New.
+	(PRLARn_ELx): New.
+	(aarch64_sys_ins_reg_supported_p): Reject EL3 registers for
+	Armv8-R AArch64.
+
+2020-09-08  Alex Coplan  <alex.coplan@arm.com>
+
 	* aarch64-tbl.h (aarch64_feature_v8_r): New.
 	(ARMV8_R): New.
 	(V8_R_INSN): New.
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 9d23b31..b6bc7e6 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -3082,7 +3082,7 @@ print_operands (bfd_vma pc, const aarch64_opcode *opcode,
 
       /* Generate the operand string in STR.  */
       aarch64_print_operand (str, sizeof (str), pc, opcode, opnds, i, &pcrel_p,
-			     &info->target, &notes);
+			     &info->target, &notes, arch_variant);
 
       /* Print the delimiter (taking account of omitted operand(s)).  */
       if (str[0] != '\0')
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 5534dc7..22d6934 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -3143,7 +3143,8 @@ void
 aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
 		       const aarch64_opcode *opcode,
 		       const aarch64_opnd_info *opnds, int idx, int *pcrel_p,
-		       bfd_vma *address, char** notes)
+		       bfd_vma *address, char** notes,
+		       aarch64_feature_set features)
 {
   unsigned int i, num_conds;
   const char *name = NULL;
@@ -3688,9 +3689,12 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
     case AARCH64_OPND_SYSREG:
       for (i = 0; aarch64_sys_regs[i].name; ++i)
 	{
+	  const aarch64_sys_reg *sr = aarch64_sys_regs + i;
+
 	  bfd_boolean exact_match
-	    = (aarch64_sys_regs[i].flags & opnd->sysreg.flags)
-	       == opnd->sysreg.flags;
+	    = (!(sr->flags & (F_REG_READ | F_REG_WRITE))
+	    || (sr->flags & opnd->sysreg.flags) == opnd->sysreg.flags)
+	    && AARCH64_CPU_HAS_FEATURE (features, sr->features);
 
 	  /* Try and find an exact match, But if that fails, return the first
 	     partial match that was found.  */
@@ -3810,9 +3814,16 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
 #define SR_FEAT(n,e,f,feat) \
   SYSREG ((n), (e), (f) | F_ARCHEXT, AARCH64_FEATURE_##feat)
 
-#define SR_RNG(n,e,f) \
-  SYSREG ((n), (e), (f) | F_ARCHEXT, AARCH64_FEATURE_RNG | AARCH64_FEATURE_V8_5)
+#define SR_FEAT2(n,e,f,fe1,fe2) \
+  SYSREG ((n), (e), (f) | F_ARCHEXT, \
+	  AARCH64_FEATURE_##fe1 | AARCH64_FEATURE_##fe2)
+
+#define SR_RNG(n,e,f)	 SR_FEAT2(n,e,f,RNG,V8_5)
+#define SR_V8_1_A(n,e,f) SR_FEAT2(n,e,f,V8_A,V8_1)
+#define SR_V8_4_A(n,e,f) SR_FEAT2(n,e,f,V8_A,V8_4)
 
+#define SR_V8_A(n,e,f)	  SR_FEAT (n,e,f,V8_A)
+#define SR_V8_R(n,e,f)	  SR_FEAT (n,e,f,V8_R)
 #define SR_V8_1(n,e,f)	  SR_FEAT (n,e,f,V8_1)
 #define SR_V8_2(n,e,f)	  SR_FEAT (n,e,f,V8_2)
 #define SR_V8_3(n,e,f)	  SR_FEAT (n,e,f,V8_3)
@@ -3827,6 +3838,27 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
 #define SR_MEMTAG(n,e,f)  SR_FEAT (n,e,f,MEMTAG)
 #define SR_SCXTNUM(n,e,f) SR_FEAT (n,e,f,SCXTNUM)
 
+#define SR_EXPAND_ELx(f,x) \
+  f (x, 1),  \
+  f (x, 2),  \
+  f (x, 3),  \
+  f (x, 4),  \
+  f (x, 5),  \
+  f (x, 6),  \
+  f (x, 7),  \
+  f (x, 8),  \
+  f (x, 9),  \
+  f (x, 10), \
+  f (x, 11), \
+  f (x, 12), \
+  f (x, 13), \
+  f (x, 14), \
+  f (x, 15),
+
+#define SR_EXPAND_EL12(f) \
+  SR_EXPAND_ELx (f,1) \
+  SR_EXPAND_ELx (f,2)
+
 /* TODO there is one more issues need to be resolved
    1. handle cpu-implementation-defined system registers.
 
@@ -3928,12 +3960,12 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_SVE  ("zidr_el1",		CPENC (3,0,C0,C0,7),	0),
   SR_CORE ("ttbr0_el1",		CPENC (3,0,C2,C0,0),	0),
   SR_CORE ("ttbr1_el1",		CPENC (3,0,C2,C0,1),	0),
-  SR_CORE ("ttbr0_el2",		CPENC (3,4,C2,C0,0),	0),
-  SR_V8_1 ("ttbr1_el2",		CPENC (3,4,C2,C0,1),	0),
+  SR_V8_A ("ttbr0_el2",		CPENC (3,4,C2,C0,0),	0),
+  SR_V8_1_A ("ttbr1_el2",	CPENC (3,4,C2,C0,1),	0),
   SR_CORE ("ttbr0_el3",		CPENC (3,6,C2,C0,0),	0),
   SR_V8_1 ("ttbr0_el12",	CPENC (3,5,C2,C0,0),	0),
   SR_V8_1 ("ttbr1_el12",	CPENC (3,5,C2,C0,1),	0),
-  SR_CORE ("vttbr_el2",		CPENC (3,4,C2,C1,0),	0),
+  SR_V8_A ("vttbr_el2",		CPENC (3,4,C2,C1,0),	0),
   SR_CORE ("tcr_el1",		CPENC (3,0,C2,C0,2),	0),
   SR_CORE ("tcr_el2",		CPENC (3,4,C2,C0,2),	0),
   SR_CORE ("tcr_el3",		CPENC (3,6,C2,C0,2),	0),
@@ -4231,7 +4263,7 @@ const aarch64_sys_reg aarch64_sys_regs [] =
 
   SR_V8_4 ("dit",		CPEN_ (3,C2,5),		0),
   SR_V8_4 ("vstcr_el2",		CPENC (3,4,C2,C6,2),	0),
-  SR_V8_4 ("vsttbr_el2",	CPENC (3,4,C2,C6,0),	0),
+  SR_V8_4_A ("vsttbr_el2",	CPENC (3,4,C2,C6,0),	0),
   SR_V8_4 ("cnthvs_tval_el2",	CPENC (3,4,C14,C4,0),	0),
   SR_V8_4 ("cnthvs_cval_el2",	CPENC (3,4,C14,C4,2),	0),
   SR_V8_4 ("cnthvs_ctl_el2",	CPENC (3,4,C14,C4,1),	0),
@@ -4258,6 +4290,27 @@ const aarch64_sys_reg aarch64_sys_regs [] =
   SR_CORE ("mpamvpm7_el2",	CPENC (3,4,C10,C6,7),	0),
   SR_CORE ("mpamvpmv_el2",	CPENC (3,4,C10,C4,1),	0),
 
+  SR_V8_R ("mpuir_el1",		CPENC (3,0,C0,C0,4),	F_REG_READ),
+  SR_V8_R ("mpuir_el2",		CPENC (3,4,C0,C0,4),	F_REG_READ),
+  SR_V8_R ("prbar_el1",		CPENC (3,0,C6,C8,0),	0),
+  SR_V8_R ("prbar_el2",		CPENC (3,4,C6,C8,0),	0),
+
+#define ENC_BARLAR(x,n,lar) \
+  CPENC (3, (x-1) << 2, C6, 8 | (n >> 1), ((n & 1) << 2) | lar)
+
+#define PRBARn_ELx(x,n) SR_V8_R ("prbar" #n "_el" #x, ENC_BARLAR (x,n,0), 0)
+#define PRLARn_ELx(x,n) SR_V8_R ("prlar" #n "_el" #x, ENC_BARLAR (x,n,1), 0)
+
+  SR_EXPAND_EL12 (PRBARn_ELx)
+  SR_V8_R ("prenr_el1",		CPENC (3,0,C6,C1,1),	0),
+  SR_V8_R ("prenr_el2",		CPENC (3,4,C6,C1,1),	0),
+  SR_V8_R ("prlar_el1",		CPENC (3,0,C6,C8,1),	0),
+  SR_V8_R ("prlar_el2",		CPENC (3,4,C6,C8,1),	0),
+  SR_EXPAND_EL12 (PRLARn_ELx)
+  SR_V8_R ("prselr_el1",	CPENC (3,0,C6,C2,1),	0),
+  SR_V8_R ("prselr_el2",	CPENC (3,4,C6,C2,1),	0),
+  SR_V8_R ("vsctlr_el2",	CPENC (3,4,C2,C0,0),	0),
+
   { 0, CPENC (0,0,0,0,0), 0, 0 }
 };
 
@@ -4462,10 +4515,18 @@ aarch64_sys_ins_reg_has_xt (const aarch64_sys_ins_reg *sys_ins_reg)
 
 extern bfd_boolean
 aarch64_sys_ins_reg_supported_p (const aarch64_feature_set features,
+		 const char *reg_name,
                  aarch64_insn reg_value,
                  uint32_t reg_flags,
                  aarch64_feature_set reg_features)
 {
+  /* Armv8-R has no EL3.  */
+  if (AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_V8_R))
+    {
+      const char *suffix = strrchr (reg_name, '_');
+      if (suffix && !strcmp (suffix, "_el3"))
+	return FALSE;
+    }
 
   if (!(reg_flags & F_ARCHEXT))
     return TRUE;