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authorKevin Buettner <kevinb@redhat.com>2003-11-24 16:45:03 +0000
committerKevin Buettner <kevinb@redhat.com>2003-11-24 16:45:03 +0000
commitd74c4203711ebf4fb6c88dd9a0f85e702c96195a (patch)
tree2f7aad67f2cfb3061ef0a542220ea843921d12f9 /sim
parent70b911ad67b47c978693f4c9e12fb2b0c75a6fea (diff)
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* frv-sim.h (GR_REGNUM_MAX, FR_REGNUM_MAX, PC_REGNUM, SPR_REGNUM_MIN)
(SPR_REGNUM_MAX): Delete. * frv.c (gdb/sim-frv.h): Include. (frvbf_fetch_register, frvbf_store_register): Use register number constants from gdb/sim-frv.h. Check availability of general purpose and float registers.
Diffstat (limited to 'sim')
-rw-r--r--sim/frv/ChangeLog9
-rw-r--r--sim/frv/frv-sim.h7
-rw-r--r--sim/frv/frv.c69
3 files changed, 64 insertions, 21 deletions
diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog
index efeb2bc..68b33ec 100644
--- a/sim/frv/ChangeLog
+++ b/sim/frv/ChangeLog
@@ -1,3 +1,12 @@
+2003-11-24 Kevin Buettner <kevinb@redhat.com>
+
+ * frv-sim.h (GR_REGNUM_MAX, FR_REGNUM_MAX, PC_REGNUM, SPR_REGNUM_MIN)
+ (SPR_REGNUM_MAX): Delete.
+ * frv.c (gdb/sim-frv.h): Include.
+ (frvbf_fetch_register, frvbf_store_register): Use register number
+ constants from gdb/sim-frv.h. Check availability of general
+ purpose and float registers.
+
2003-11-03 Dave Brolley <brolley@redhat.com>
* cache.c (address_interference): Check for higher priority requests
diff --git a/sim/frv/frv-sim.h b/sim/frv/frv-sim.h
index 53d131f..39da19c 100644
--- a/sim/frv/frv-sim.h
+++ b/sim/frv/frv-sim.h
@@ -29,13 +29,6 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#define H_SPR_ACCG4 1476
#define H_SPR_ACCG63 1535
-/* gdb register numbers. */
-#define GR_REGNUM_MAX 63
-#define FR_REGNUM_MAX 127
-#define PC_REGNUM 128
-#define SPR_REGNUM_MIN 129
-#define SPR_REGNUM_MAX (SPR_REGNUM_MIN + 4096 - 1)
-
/* Initialization of the frv cpu. */
void frv_initialize (SIM_CPU *, SIM_DESC);
void frv_term (SIM_DESC);
diff --git a/sim/frv/frv.c b/sim/frv/frv.c
index cc71eca..de1ff1d 100644
--- a/sim/frv/frv.c
+++ b/sim/frv/frv.c
@@ -27,6 +27,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#include "cgen-engine.h"
#include "cgen-par.h"
#include "bfd.h"
+#include "gdb/sim-frv.h"
#include <math.h>
/* Maintain a flag in order to know when to write the address of the next
@@ -38,17 +39,37 @@ int frvbf_write_next_vliw_addr_to_LR;
int
frvbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
{
- if (rn <= GR_REGNUM_MAX)
- SETTSI (buf, GET_H_GR (rn));
- else if (rn <= FR_REGNUM_MAX)
- SETTSI (buf, GET_H_FR (rn - GR_REGNUM_MAX - 1));
- else if (rn == PC_REGNUM)
+ if (SIM_FRV_GR0_REGNUM <= rn && rn <= SIM_FRV_GR63_REGNUM)
+ {
+ int hi_available, lo_available;
+ int grn = rn - SIM_FRV_GR0_REGNUM;
+
+ frv_gr_registers_available (current_cpu, &hi_available, &lo_available);
+
+ if ((grn < 32 && !lo_available) || (grn >= 32 && !hi_available))
+ return 0;
+ else
+ SETTSI (buf, GET_H_GR (grn));
+ }
+ else if (SIM_FRV_FR0_REGNUM <= rn && rn <= SIM_FRV_FR63_REGNUM)
+ {
+ int hi_available, lo_available;
+ int frn = rn - SIM_FRV_FR0_REGNUM;
+
+ frv_fr_registers_available (current_cpu, &hi_available, &lo_available);
+
+ if ((frn < 32 && !lo_available) || (frn >= 32 && !hi_available))
+ return 0;
+ else
+ SETTSI (buf, GET_H_FR (frn));
+ }
+ else if (rn == SIM_FRV_PC_REGNUM)
SETTSI (buf, GET_H_PC ());
- else if (rn >= SPR_REGNUM_MIN && rn <= SPR_REGNUM_MAX)
+ else if (SIM_FRV_SPR0_REGNUM <= rn && rn <= SIM_FRV_SPR4095_REGNUM)
{
/* Make sure the register is implemented. */
FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (current_cpu);
- int spr = rn - SPR_REGNUM_MIN;
+ int spr = rn - SIM_FRV_SPR0_REGNUM;
if (! control->spr[spr].implemented)
return 0;
SETTSI (buf, GET_H_SPR (spr));
@@ -67,17 +88,37 @@ frvbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
int
frvbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
{
- if (rn <= GR_REGNUM_MAX)
- SET_H_GR (rn, GETTSI (buf));
- else if (rn <= FR_REGNUM_MAX)
- SET_H_FR (rn - GR_REGNUM_MAX - 1, GETTSI (buf));
- else if (rn == PC_REGNUM)
+ if (SIM_FRV_GR0_REGNUM <= rn && rn <= SIM_FRV_GR63_REGNUM)
+ {
+ int hi_available, lo_available;
+ int grn = rn - SIM_FRV_GR0_REGNUM;
+
+ frv_gr_registers_available (current_cpu, &hi_available, &lo_available);
+
+ if ((grn < 32 && !lo_available) || (grn >= 32 && !hi_available))
+ return 0;
+ else
+ SET_H_GR (grn, GETTSI (buf));
+ }
+ else if (SIM_FRV_FR0_REGNUM <= rn && rn <= SIM_FRV_FR63_REGNUM)
+ {
+ int hi_available, lo_available;
+ int frn = rn - SIM_FRV_FR0_REGNUM;
+
+ frv_fr_registers_available (current_cpu, &hi_available, &lo_available);
+
+ if ((frn < 32 && !lo_available) || (frn >= 32 && !hi_available))
+ return 0;
+ else
+ SET_H_FR (frn, GETTSI (buf));
+ }
+ else if (rn == SIM_FRV_PC_REGNUM)
SET_H_PC (GETTSI (buf));
- else if (rn >= SPR_REGNUM_MIN && rn <= SPR_REGNUM_MAX)
+ else if (SIM_FRV_SPR0_REGNUM <= rn && rn <= SIM_FRV_SPR4095_REGNUM)
{
/* Make sure the register is implemented. */
FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (current_cpu);
- int spr = rn - SPR_REGNUM_MIN;
+ int spr = rn - SIM_FRV_SPR0_REGNUM;
if (! control->spr[spr].implemented)
return 0;
SET_H_SPR (spr, GETTSI (buf));