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| author | Bernd Edlinger <bernd.edlinger@hotmail.de> | 2024-05-09 07:58:08 +0200 |
|---|---|---|
| committer | Bernd Edlinger <bernd.edlinger@hotmail.de> | 2024-05-09 17:04:14 +0200 |
| commit | b75187cd9480a35f402bb6c384299bf89091bd7b (patch) | |
| tree | 10bcbee54e33c1b5f153f915f7ffb8b0aa291bba /sim | |
| parent | 5021daf303393722f58f4422d7ad53d526aa2d50 (diff) | |
| download | gdb-b75187cd9480a35f402bb6c384299bf89091bd7b.zip gdb-b75187cd9480a35f402bb6c384299bf89091bd7b.tar.gz gdb-b75187cd9480a35f402bb6c384299bf89091bd7b.tar.bz2 | |
sim: riscv: Fix build issue due to recent binutils commit
The commit c144f6383379 removed INSN_CLASS_A and
added INSN_CLASS_ZAAMO and INSN_CLASS_ZALRSC instead,
which broke the build of the sim for riscv targets.
Fix that by using the new INSN_CLASS types.
Fixes: c144f6383379 ("RISC-V: Support B, Zaamo and Zalrsc extensions.")
Approved-By: Tom Tromey <tom@tromey.com>
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/riscv/sim-main.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 41973d9..378e6f1 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1299,7 +1299,8 @@ execute_one (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op) switch (op->insn_class) { - case INSN_CLASS_A: + case INSN_CLASS_ZAAMO: + case INSN_CLASS_ZALRSC: return execute_a (cpu, iw, op); case INSN_CLASS_C: /* Check whether model with C extension is selected. */ |