sim: cgen: hoist rules to the top-level build

The rules seem to generate the same output as existing subdir cgen
rules with cgen ports, so hopefully this should be correct.  These
are the last set of codegen rules that we run in subdirs, so this
will help unblock killing off subdir builds entirely.

2 files changed, 113 insertions, 0 deletions

diff --git a/sim/Makefile.in b/sim/Makefile.in
index b6aa1a7..b19c0c2 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -1293,6 +1293,59 @@ SIM_COMMON_LIBS = \
 	$(LIBGNU) \
 	$(LIBGNU_EXTRA_LIBS)
 
+GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
+CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
+CGENFLAGS = -v
+CGEN_CPU_DIR = $(cgendir)/cpu
+CPU_DIR = $(srcroot)/cpu
+CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
+CGEN_READ_SCM = $(cgendir)/sim.scm
+CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
+CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
+CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
+CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
+CGEN_CPU_EXTR = /extr/
+CGEN_CPU_READ = /read/
+CGEN_CPU_WRITE = /write/
+CGEN_CPU_SEM = /sem/
+CGEN_CPU_SEMSW = /semsw/
+CGEN_WRAPPER = $(srccom)/cgen.sh
+CGEN_GEN_ARCH = \
+	$(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
+		$(CGEN_ARCHFILE) ignored
+
+CGEN_GEN_CPU = \
+	$(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) "$$EXTRAFILES"
+
+CGEN_GEN_DEFS = \
+	$(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) ignored
+
+CGEN_GEN_DECODE = \
+	$(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) "$$EXTRAFILES"
+
+CGEN_GEN_CPU_DECODE = \
+	$(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) "$$EXTRAFILES"
+
+CGEN_GEN_CPU_DESC = \
+	$(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) ignored $$opcfile
+
 
 # igen leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
 # leak detection while running it.
diff --git a/sim/common/local.mk b/sim/common/local.mk
index dde2481..22917e0 100644
--- a/sim/common/local.mk
+++ b/sim/common/local.mk
@@ -142,3 +142,63 @@ SIM_COMMON_LIBS = \
 	$(LIBIBERTY_LIB) \
 	$(LIBGNU) \
 	$(LIBGNU_EXTRA_LIBS)
+
+##
+## CGEN support.
+##
+
+## If the local tree has a bundled copy of guile, use that.
+GUILE = $(or $(wildcard ../guile/libguile/guile),guile)
+CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s"
+CGENFLAGS = -v
+CGEN_CPU_DIR = $(cgendir)/cpu
+## Most ports use the files here instead of cgen/cpu.
+CPU_DIR = $(srcroot)/cpu
+CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu
+
+CGEN_READ_SCM = $(cgendir)/sim.scm
+CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm
+CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm
+CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm
+CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm
+
+## Various choices for which cpu specific files to generate.
+## These are passed to cgen.sh in the "extrafiles" argument.
+CGEN_CPU_EXTR = /extr/
+CGEN_CPU_READ = /read/
+CGEN_CPU_WRITE = /write/
+CGEN_CPU_SEM = /sem/
+CGEN_CPU_SEMSW = /semsw/
+
+CGEN_WRAPPER = $(srccom)/cgen.sh
+
+CGEN_GEN_ARCH = \
+	$(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \
+		$(CGEN_ARCHFILE) ignored
+CGEN_GEN_CPU = \
+	$(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) "$$EXTRAFILES"
+CGEN_GEN_DEFS = \
+	$(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) ignored
+CGEN_GEN_DECODE = \
+	$(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) "$$EXTRAFILES"
+CGEN_GEN_CPU_DECODE = \
+	$(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) "$$EXTRAFILES"
+CGEN_GEN_CPU_DESC = \
+	$(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \
+		$(CGEN) $(cgendir) "$(CGENFLAGS)" \
+		$(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \
+		$(CGEN_ARCHFILE) ignored $$opcfile