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authorJoel Sherrill <joel.sherrill@oarcorp.com>2012-09-04 21:40:46 +0000
committerJoel Sherrill <joel.sherrill@oarcorp.com>2012-09-04 21:40:46 +0000
commit87c8644f8bcb28ee5fc5752382063b0d15f4b29e (patch)
tree15cc20dc19e77e7adc34c7f453c85b647c895ae2 /sim
parentb3e14edafcdc558d724452ee5b803ff096c32d0f (diff)
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2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
* configure.ac: Always link against dv-sockser.o. * configure: Regenerate.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog5
-rwxr-xr-xsim/mips/configure3
-rw-r--r--sim/mips/configure.ac3
3 files changed, 7 insertions, 4 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 39830b1..95e23de 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,8 @@
+2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ * configure.ac: Always link against dv-sockser.o.
+ * configure: Regenerate.
+
2012-06-15 Joel Brobecker <brobecker@adacore.com>
* config.in, configure: Regenerate.
diff --git a/sim/mips/configure b/sim/mips/configure
index 1986f33..b0b6a63 100755
--- a/sim/mips/configure
+++ b/sim/mips/configure
@@ -5845,11 +5845,9 @@ case "${target}" in
mips*tx39*)
hw_enabled=yes
hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
- mips_extra_objs="dv-sockser.o"
SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
;;
*)
- mips_extra_objs=""
;;
esac
@@ -5956,6 +5954,7 @@ fi
;;
esac
+mips_extra_objs="dv-sockser.o"
diff --git a/sim/mips/configure.ac b/sim/mips/configure.ac
index 5f59637..3d833a6 100644
--- a/sim/mips/configure.ac
+++ b/sim/mips/configure.ac
@@ -409,14 +409,13 @@ case "${target}" in
mips*tx39*)
hw_enabled=yes
hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio"
- mips_extra_objs="dv-sockser.o"
SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1"
;;
*)
- mips_extra_objs=""
;;
esac
SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices)
+mips_extra_objs="dv-sockser.o"
AC_SUBST(mips_extra_objs)